From patchwork Tue Nov 2 07:31:22 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sheng Yang X-Patchwork-Id: 296792 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oA27VNLK005299 for ; Tue, 2 Nov 2010 07:31:24 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932768Ab0KBHbS (ORCPT ); Tue, 2 Nov 2010 03:31:18 -0400 Received: from mga02.intel.com ([134.134.136.20]:51130 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932713Ab0KBHbQ (ORCPT ); Tue, 2 Nov 2010 03:31:16 -0400 Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga101.jf.intel.com with ESMTP; 02 Nov 2010 00:31:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.58,279,1286175600"; d="scan'208";a="673319015" Received: from syang10-desktop.sh.intel.com (HELO syang10-desktop.localnet) ([10.239.13.14]) by orsmga001.jf.intel.com with ESMTP; 02 Nov 2010 00:31:14 -0700 From: Sheng Yang Organization: Intel Opensource Technology Center To: Jan Kiszka Subject: Re: [PATCH] intel-iommu: Fix use after release during device attach Date: Tue, 2 Nov 2010 15:31:22 +0800 User-Agent: KMail/1.13.5 (Linux/2.6.35-22-generic; KDE/4.5.1; x86_64; ; ) Cc: Linux Kernel Mailing List , kvm , Avi Kivity , Marcelo Tosatti , iommu@lists.linux-foundation.org, David Woodhouse References: <4CCFB84F.6050102@web.de> In-Reply-To: <4CCFB84F.6050102@web.de> MIME-Version: 1.0 Message-Id: <201011021531.22886.sheng@linux.intel.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Tue, 02 Nov 2010 07:31:24 +0000 (UTC) diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c index c9171be..603cdc0 100644 --- a/drivers/pci/intel-iommu.c +++ b/drivers/pci/intel-iommu.c @@ -236,7 +236,7 @@ static inline u64 dma_pte_addr(struct dma_pte *pte) return pte->val & VTD_PAGE_MASK; #else /* Must have a full atomic 64-bit read */ - return __cmpxchg64(pte, 0ULL, 0ULL) & VTD_PAGE_MASK; + return __cmpxchg64(&pte->val, 0ULL, 0ULL) & VTD_PAGE_MASK; #endif }