@@ -63,6 +63,10 @@ static void assigned_dev_load_option_rom(AssignedDevice *dev);
static void assigned_dev_unregister_msix_mmio(AssignedDevice *dev);
+static void assigned_device_pci_cap_write_config(PCIDevice *pci_dev,
+ uint32_t address,
+ uint32_t val, int len);
+
static uint32_t assigned_dev_ioport_rw(AssignedDevRegion *dev_region,
uint32_t addr, int len, uint32_t *val)
{
@@ -406,14 +410,17 @@ static void assigned_dev_pci_write_config(PCIDevice *d, uint32_t address,
((d->devfn >> 3) & 0x1F), (d->devfn & 0x7),
(uint16_t) address, val, len);
+ if (address > PCI_CONFIG_HEADER_SIZE && d->config_map[address]) {
+ return assigned_device_pci_cap_write_config(d, address, val, len);
+ }
+
if (address == 0x4) {
pci_default_write_config(d, address, val, len);
/* Continue to program the card */
}
if ((address >= 0x10 && address <= 0x24) || address == 0x30 ||
- address == 0x34 || address == 0x3c || address == 0x3d ||
- (address > PCI_CONFIG_HEADER_SIZE && d->config_map[address])) {
+ address == 0x34 || address == 0x3c || address == 0x3d) {
/* used for update-mappings (BAR emulation) */
pci_default_write_config(d, address, val, len);
return;
@@ -1249,7 +1256,7 @@ static void assigned_device_pci_cap_write_config(PCIDevice *pci_dev, uint32_t ad
{
AssignedDevice *assigned_dev = container_of(pci_dev, AssignedDevice, dev);
- pci_default_cap_write_config(pci_dev, address, val, len);
+ pci_default_write_config(pci_dev, address, val, len);
#ifdef KVM_CAP_IRQ_ROUTING
#ifdef KVM_CAP_DEVICE_MSI
if (assigned_dev->cap.available & ASSIGNED_DEVICE_CAP_MSI) {
@@ -1478,9 +1485,6 @@ static int assigned_initfn(struct PCIDevice *pci_dev)
dev->h_busnr = dev->host.bus;
dev->h_devfn = PCI_DEVFN(dev->host.dev, dev->host.func);
- pci_register_capability_handlers(pci_dev, NULL,
- assigned_device_pci_cap_write_config);
-
if (assigned_device_pci_cap_init(pci_dev) < 0)
goto out;
@@ -772,8 +772,6 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus,
config_write = pci_default_write_config;
pci_dev->config_read = config_read;
pci_dev->config_write = config_write;
- pci_dev->cap.config_read = pci_default_cap_read_config;
- pci_dev->cap.config_write = pci_default_cap_write_config;
bus->devices[devfn] = pci_dev;
pci_dev->irq = qemu_allocate_irqs(pci_set_irq, pci_dev, PCI_NUM_PINS);
pci_dev->version_id = 2; /* Current pci device vmstate version */
@@ -1070,57 +1068,21 @@ static void pci_update_irq_disabled(PCIDevice *d, int was_irq_disabled)
}
}
-static uint32_t pci_read_config(PCIDevice *d,
- uint32_t address, int len)
+uint32_t pci_default_read_config(PCIDevice *d,
+ uint32_t address, int len)
{
uint32_t val = 0;
-
+ assert(len == 1 || len == 2 || len == 4);
len = MIN(len, pci_config_size(d) - address);
memcpy(&val, d->config + address, len);
return le32_to_cpu(val);
}
-uint32_t pci_default_read_config(PCIDevice *d,
- uint32_t address, int len)
-{
- assert(len == 1 || len == 2 || len == 4);
-
- if (address > PCI_CONFIG_HEADER_SIZE && d->config_map[address]) {
- return d->cap.config_read(d, address, len);
- }
-
- return pci_read_config(d, address, len);
-}
-
-uint32_t pci_default_cap_read_config(PCIDevice *pci_dev,
- uint32_t address, int len)
-{
- return pci_read_config(pci_dev, address, len);
-}
-
-void pci_default_cap_write_config(PCIDevice *pci_dev,
- uint32_t address, uint32_t val, int len)
-{
- uint32_t config_size = pci_config_size(pci_dev);
- int i;
-
- for (i = 0; i < len && address + i < config_size; val >>= 8, ++i) {
- uint8_t wmask = pci_dev->wmask[address + i];
- pci_dev->config[address + i] =
- (pci_dev->config[address + i] & ~wmask) | (val & wmask);
- }
-}
-
void pci_default_write_config(PCIDevice *d, uint32_t addr, uint32_t val, int l)
{
int i, was_irq_disabled = pci_irq_disabled(d);
uint32_t config_size = pci_config_size(d);
- if (addr > PCI_CONFIG_HEADER_SIZE && d->config_map[addr]) {
- d->cap.config_write(d, addr, val, l);
- return;
- }
-
for (i = 0; i < l && addr + i < config_size; val >>= 8, ++i) {
uint8_t wmask = d->wmask[addr + i];
uint8_t w1cmask = d->w1cmask[addr + i];
@@ -1750,23 +1712,6 @@ PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn,
return dev;
}
-void pci_register_capability_handlers(PCIDevice *pdev,
- PCICapConfigReadFunc *config_read,
- PCICapConfigWriteFunc *config_write)
-{
- if (config_read) {
- pdev->cap.config_read = config_read;
- } else {
- pdev->cap.config_read = pci_default_cap_read_config;
- }
-
- if (config_write) {
- pdev->cap.config_write = config_write;
- } else {
- pdev->cap.config_write = pci_default_cap_write_config;
- }
-}
-
PCIDevice *pci_create(PCIBus *bus, int devfn, const char *name)
{
return pci_create_multifunction(bus, devfn, false, name);
@@ -85,11 +85,6 @@ typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num,
pcibus_t addr, pcibus_t size, int type);
typedef int PCIUnregisterFunc(PCIDevice *pci_dev);
-typedef void PCICapConfigWriteFunc(PCIDevice *pci_dev,
- uint32_t address, uint32_t val, int len);
-typedef uint32_t PCICapConfigReadFunc(PCIDevice *pci_dev,
- uint32_t address, int len);
-
typedef struct PCIIORegion {
pcibus_t addr; /* current PCI mapping address. -1 means not mapped */
#define PCI_BAR_UNMAPPED (~(pcibus_t)0)
@@ -217,12 +212,6 @@ struct PCIDevice {
struct kvm_msix_message *msix_irq_entries;
msix_mask_notifier_func msix_mask_notifier;
-
- /* Device capability configuration space */
- struct {
- PCICapConfigReadFunc *config_read;
- PCICapConfigWriteFunc *config_write;
- } cap;
};
PCIDevice *pci_register_device(PCIBus *bus, const char *name,
@@ -237,10 +226,6 @@ void pci_register_bar(PCIDevice *pci_dev, int region_num,
void pci_map_option_rom(PCIDevice *pdev, int region_num, pcibus_t addr,
pcibus_t size, int type);
-void pci_register_capability_handlers(PCIDevice *pci_dev,
- PCICapConfigReadFunc *config_read,
- PCICapConfigWriteFunc *config_write);
-
int pci_map_irq(PCIDevice *pci_dev, int pin);
int pci_add_capability(PCIDevice *pdev, uint8_t cap_id,
@@ -256,10 +241,6 @@ void pci_default_write_config(PCIDevice *d,
uint32_t address, uint32_t val, int len);
void pci_device_save(PCIDevice *s, QEMUFile *f);
int pci_device_load(PCIDevice *s, QEMUFile *f);
-uint32_t pci_default_cap_read_config(PCIDevice *pci_dev,
- uint32_t address, int len);
-void pci_default_cap_write_config(PCIDevice *pci_dev,
- uint32_t address, uint32_t val, int len);
typedef void (*pci_set_irq_fn)(void *opaque, int irq_num, int level);
typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num);
typedef int (*pci_hotplug_fn)(DeviceState *qdev, PCIDevice *pci_dev, int state);