From patchwork Thu Jan 6 16:41:46 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Serge E. Hallyn" X-Patchwork-Id: 459491 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p06Geg5q020155 for ; Thu, 6 Jan 2011 16:40:42 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752374Ab1AFQkj (ORCPT ); Thu, 6 Jan 2011 11:40:39 -0500 Received: from 184-106-158-135.static.cloud-ips.com ([184.106.158.135]:59820 "EHLO mail" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752124Ab1AFQki (ORCPT ); Thu, 6 Jan 2011 11:40:38 -0500 Received: by mail (Postfix, from userid 1000) id 9E72920D77; Thu, 6 Jan 2011 16:41:46 +0000 (UTC) Date: Thu, 6 Jan 2011 16:41:46 +0000 From: "Serge E. Hallyn" To: Stefan Hajnoczi Cc: Peter Lieven , Blue Swirl , qemu-devel@nongnu.org, kvm@vger.kernel.org, "Serge E. Hallyn" Subject: Re: FIXED: Re: [Qemu-devel] possible regression in qemu-kvm 0.13.0 (memtest) Message-ID: <20110106164146.GA26369@mail.hallyn.com> References: <5C297A9E-0B1C-4273-9A7B-8190CE4DB87E@dlh.net> <20110105170106.GA19665@mail.hallyn.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20110105170106.GA19665@mail.hallyn.com> User-Agent: Mutt/1.5.20 (2009-06-14) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 06 Jan 2011 16:40:43 +0000 (UTC) diff --git a/hw/pc.c b/hw/pc.c index 18a4a9f..e63b397 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -411,11 +411,71 @@ void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, qemu_register_reset(pc_cmos_init_late, &arg); } +/* port 92 stuff: could be split off */ +typedef struct Port92State { + ISADevice dev; + uint8_t outport; + qemu_irq *a20_out; +} Port92State; + +static void port92_write(void *opaque, uint32_t addr, uint32_t val) +{ + Port92State *s = opaque; + + DPRINTF("port92: write 0x%02x\n", val); + s->outport = val; + qemu_set_irq(*s->a20_out, (val >> 1) & 1); + if (val & 1) { + qemu_system_reset_request(); + } +} + +static uint32_t port92_read(void *opaque, uint32_t addr) +{ + Port92State *s = opaque; + uint32_t ret; + + ret = s->outport; + DPRINTF("port92: read 0x%02x\n", ret); + return ret; +} + +static void port92_init(ISADevice *dev, qemu_irq *a20_out) +{ + Port92State *s = DO_UPCAST(Port92State, dev, dev); + + s->a20_out = a20_out; +} + +static int port92_initfn(ISADevice *dev) +{ + Port92State *s = DO_UPCAST(Port92State, dev, dev); + + register_ioport_read(0x92, 1, 1, port92_read, s); + register_ioport_write(0x92, 1, 1, port92_write, s); + isa_init_ioport(dev, 0x92); + return 0; +} + +static ISADeviceInfo port92_info = { + .qdev.name = "port92", + .qdev.size = sizeof(Port92State), + .qdev.no_user = 1, + .init = port92_initfn, +}; + +static void port92_register(void) +{ + isa_qdev_register(&port92_info); +} +device_init(port92_register) + static void handle_a20_line_change(void *opaque, int irq, int level) { CPUState *cpu = opaque; /* XXX: send to all CPUs ? */ + /* XXX: add logic to handle multiple A20 line sources */ cpu_x86_set_a20(cpu, level); } @@ -1027,7 +1087,7 @@ void pc_basic_device_init(qemu_irq *isa_irq, PITState *pit; qemu_irq rtc_irq = NULL; qemu_irq *a20_line; - ISADevice *i8042; + ISADevice *i8042, *port92; qemu_irq *cpu_exit_irq; register_ioport_write(0x80, 1, 1, ioport80_write, NULL); @@ -1061,10 +1121,12 @@ void pc_basic_device_init(qemu_irq *isa_irq, } } - a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 1); + a20_line = qemu_allocate_irqs(handle_a20_line_change, first_cpu, 2); i8042 = isa_create_simple("i8042"); - i8042_setup_a20_line(i8042, a20_line); + i8042_setup_a20_line(i8042, &a20_line[0]); vmmouse_init(i8042); + port92 = isa_create_simple("port92"); + port92_init(port92, &a20_line[1]); cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1); DMA_init(0, cpu_exit_irq); diff --git a/hw/pckbd.c b/hw/pckbd.c index 863b485..958de0a 100644 --- a/hw/pckbd.c +++ b/hw/pckbd.c @@ -211,10 +211,8 @@ static void kbd_queue(KBDState *s, int b, int aux) ps2_queue(s->kbd, b); } -static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) +static void outport_write(KBDState *s, uint32_t addr, uint32_t val) { - KBDState *s = opaque; - DPRINTF("kbd: write outport=0x%02x\n", val); s->outport = val; if (s->a20_out) { @@ -225,16 +223,6 @@ static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) } } -static uint32_t ioport92_read(void *opaque, uint32_t addr) -{ - KBDState *s = opaque; - uint32_t ret; - - ret = s->outport; - DPRINTF("kbd: read outport=0x%02x\n", ret); - return ret; -} - static void kbd_write_command(void *opaque, uint32_t addr, uint32_t val) {