From patchwork Mon Mar 28 12:18:43 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joerg Roedel X-Patchwork-Id: 668331 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p2SCIwpA031983 for ; Mon, 28 Mar 2011 12:18:59 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751919Ab1C1MSy (ORCPT ); Mon, 28 Mar 2011 08:18:54 -0400 Received: from ch1outboundpool.messaging.microsoft.com ([216.32.181.185]:39583 "EHLO ch1outboundpool.messaging.microsoft.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750759Ab1C1MSy (ORCPT ); Mon, 28 Mar 2011 08:18:54 -0400 Received: from mail146-ch1-R.bigfish.com (216.32.181.172) by CH1EHSOBE014.bigfish.com (10.43.70.64) with Microsoft SMTP Server id 14.1.225.8; Mon, 28 Mar 2011 12:18:53 +0000 Received: from mail146-ch1 (localhost.localdomain [127.0.0.1]) by mail146-ch1-R.bigfish.com (Postfix) with ESMTP id 189A9880293; Mon, 28 Mar 2011 12:18:53 +0000 (UTC) X-SpamScore: -35 X-BigFish: VPS-35(zzbb2dKbb2cK1432N98dN9371Pzz1202hzz15d4R8275bhz32i637h668h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: KIP:(null); UIP:(null); IPVD:NLI; H:ausb3twp01.amd.com; RD:none; EFVD:NLI Received: from mail146-ch1 (localhost.localdomain [127.0.0.1]) by mail146-ch1 (MessageSwitch) id 1301314732675088_3212; Mon, 28 Mar 2011 12:18:52 +0000 (UTC) Received: from CH1EHSMHS024.bigfish.com (snatpool1.int.messaging.microsoft.com [10.43.68.249]) by mail146-ch1.bigfish.com (Postfix) with ESMTP id 9E98C13D0051; Mon, 28 Mar 2011 12:18:52 +0000 (UTC) Received: from ausb3twp01.amd.com (163.181.249.108) by CH1EHSMHS024.bigfish.com (10.43.70.24) with Microsoft SMTP Server id 14.1.225.8; Mon, 28 Mar 2011 12:18:46 +0000 X-WSS-ID: 0LIROV6-01-2AH-02 X-M-MSG: Received: from sausexedgep02.amd.com (sausexedgep02-ext.amd.com [163.181.249.73]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by ausb3twp01.amd.com (Tumbleweed MailGate 3.7.2) with ESMTP id 2AD4F1028848; Mon, 28 Mar 2011 07:18:42 -0500 (CDT) Received: from sausexhtp02.amd.com (163.181.3.152) by sausexedgep02.amd.com (163.181.36.59) with Microsoft SMTP Server (TLS) id 8.3.106.1; Mon, 28 Mar 2011 07:26:21 -0500 Received: from storexhtp01.amd.com (172.24.4.3) by sausexhtp02.amd.com (163.181.3.152) with Microsoft SMTP Server (TLS) id 8.3.83.0; Mon, 28 Mar 2011 07:18:46 -0500 Received: from gwo.osrc.amd.com (165.204.16.204) by storexhtp01.amd.com (172.24.4.3) with Microsoft SMTP Server id 8.3.83.0; Mon, 28 Mar 2011 08:18:44 -0400 Received: from lemmy.osrc.amd.com (lemmy.osrc.amd.com [165.204.15.93]) by gwo.osrc.amd.com (Postfix) with ESMTP id 7088A49C1F7; Mon, 28 Mar 2011 13:18:43 +0100 (BST) Received: by lemmy.osrc.amd.com (Postfix, from userid 1000) id 591DFFFB8B; Mon, 28 Mar 2011 14:18:43 +0200 (CEST) Date: Mon, 28 Mar 2011 14:18:43 +0200 From: "Roedel, Joerg" To: Avi Kivity CC: Marcelo Tosatti , "kvm@vger.kernel.org" Subject: Re: [PATCH 08/13] KVM: SVM: Add intercept checks for SVM instructions Message-ID: <20110328121843.GC2085@amd.com> References: <1301309210-11120-1-git-send-email-joerg.roedel@amd.com> <1301309210-11120-9-git-send-email-joerg.roedel@amd.com> <4D907A35.9090008@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <4D907A35.9090008@redhat.com> User-Agent: Mutt/1.5.20 (2009-06-14) X-OriginatorOrg: amd.com Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Mon, 28 Mar 2011 12:19:00 +0000 (UTC) diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index ec2e9ad..8b8f63d 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c @@ -75,6 +75,8 @@ #define Stack (1<<13) /* Stack instruction (push/pop) */ #define Group (1<<14) /* Bits 3:5 of modrm byte extend opcode */ #define GroupDual (1<<15) /* Alternate decoding of mod == 3 */ +#define RMExt (1<<16) /* Opcode extension in ModRM r/m if mod == 3 */ + /* Misc flags */ #define VendorSpecific (1<<22) /* Vendor specific instruction */ #define NoAccess (1<<23) /* Don't access memory (lea/invlpg/verr etc) */ @@ -2349,6 +2351,7 @@ static int em_mov(struct x86_emulate_ctxt *ctxt) #define D(_y) { .flags = (_y) } #define DI(_y, _i) { .flags = (_y), .intercept = x86_intercept_##_i } #define N D(0) +#define EXT(_f, _e) { .flags = ((_f) | RMExt), .u.group = (_e) } #define G(_f, _g) { .flags = ((_f) | Group), .u.group = (_g) } #define GD(_f, _g) { .flags = ((_f) | Group | GroupDual), .u.gdual = (_g) } #define I(_f, _e) { .flags = (_f), .u.execute = (_e) } @@ -2363,6 +2366,17 @@ static int em_mov(struct x86_emulate_ctxt *ctxt) D2bv(((_f) & ~Lock) | DstAcc | SrcImm) +static struct opcode group7_rm3[] = { + DI(SrcNone | ModRM | Priv, vmrun), + DI(SrcNone | ModRM , vmmcall), + DI(SrcNone | ModRM | Priv, vmload), + DI(SrcNone | ModRM | Priv, vmsave), + DI(SrcNone | ModRM | Priv, stgi), + DI(SrcNone | ModRM | Priv, clgi), + DI(SrcNone | ModRM | Priv, skinit), + DI(SrcNone | ModRM | Priv, invlpga), +}; + static struct opcode group1[] = { X7(D(Lock)), N }; @@ -2406,7 +2420,7 @@ static struct group_dual group7 = { { DI(SrcMem | ModRM | ByteOp | Priv | NoAccess, invlpg), }, { D(SrcNone | ModRM | Priv | VendorSpecific), N, - N, D(SrcNone | ModRM | Priv | VendorSpecific), + N, EXT(0, group7_rm3), DI(SrcNone | ModRM | DstMem | Mov, smsw), N, DI(SrcMem16 | ModRM | Mov | Priv, lmsw), N, } }; @@ -2601,6 +2615,7 @@ static struct opcode twobyte_table[256] = { #undef G #undef GD #undef I +#undef EXT #undef D2bv #undef I2bv @@ -2778,6 +2793,12 @@ done_prefixes: opcode = g_mod3[goffset]; else opcode = g_mod012[goffset]; + + if (opcode.flags & RMExt) { + goffset = c->modrm & 7; + opcode = opcode.u.group[goffset]; + } + c->d |= opcode.flags; } diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c index 485a09f..9b22f5f 100644 --- a/arch/x86/kvm/svm.c +++ b/arch/x86/kvm/svm.c @@ -3896,6 +3896,14 @@ static struct __x86_intercept { [x86_intercept_sidt] = POST_MEM(SVM_EXIT_IDTR_READ), [x86_intercept_lgdt] = POST_MEM(SVM_EXIT_GDTR_WRITE), [x86_intercept_lidt] = POST_MEM(SVM_EXIT_IDTR_WRITE), + [x86_intercept_vmrun] = POST_EX(SVM_EXIT_VMRUN), + [x86_intercept_vmmcall] = POST_EX(SVM_EXIT_VMMCALL), + [x86_intercept_vmload] = POST_EX(SVM_EXIT_VMLOAD), + [x86_intercept_vmsave] = POST_EX(SVM_EXIT_VMSAVE), + [x86_intercept_stgi] = POST_EX(SVM_EXIT_STGI), + [x86_intercept_clgi] = POST_EX(SVM_EXIT_CLGI), + [x86_intercept_skinit] = POST_EX(SVM_EXIT_SKINIT), + [x86_intercept_invlpga] = POST_EX(SVM_EXIT_INVLPGA), }; #undef POST_EX