From patchwork Tue May 17 20:44:32 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Williamson X-Patchwork-Id: 9115161 Return-Path: X-Original-To: patchwork-kvm@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 2FAF5BF29F for ; Tue, 17 May 2016 20:44:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1B9C120268 for ; Tue, 17 May 2016 20:44:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2190F20222 for ; Tue, 17 May 2016 20:44:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751471AbcEQUoe (ORCPT ); Tue, 17 May 2016 16:44:34 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54823 "EHLO mx1.redhat.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751191AbcEQUod (ORCPT ); Tue, 17 May 2016 16:44:33 -0400 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3084485542; Tue, 17 May 2016 20:44:33 +0000 (UTC) Received: from gimli.home (ovpn-116-97.phx2.redhat.com [10.3.116.97]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id u4HKiWjL000517; Tue, 17 May 2016 16:44:32 -0400 Subject: [PATCH v5] fw/pci: Add support for mapping Intel IGD via QEMU From: Alex Williamson To: seabios@seabios.org Cc: alex.williamson@redhat.com, allen.m.kay@intel.com, kraxel@redhat.com, kvm@vger.kernel.org, qemu-devel@nongnu.org Date: Tue, 17 May 2016 14:44:32 -0600 Message-ID: <20160517203151.6996.95545.stgit@gimli.home> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.68 on 10.5.11.24 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Tue, 17 May 2016 20:44:33 +0000 (UTC) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00,FSL_HELO_HOME, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP QEMU provides two fw_cfg files to support IGD. The first holds the OpRegion data which holds the Video BIOS Table (VBT). This needs to be copied into reserved memory and the address stored in the ASL Storage register of the device at 0xFC offset in PCI config space. The OpRegion is generally 8KB. This file is named "etc/igd-opregion". The second file tells us the required size of the stolen memory space for the device. This space requires 1MB alignment and is generally either 1MB to 8MB depending on hardware config, but may be hundreds of MB for user specified stolen memory. The base address of the reserved memory allocated for this is written back to the Base Data of Stolen Memory register (BDSM) at PCI config offset 0x5C on the device. This file is named "etc/igd-bdsm-size". QEMU documents these fw_cfg entries in docs/igd-assign.txt. Signed-off-by: Alex Williamson --- v6: fw_cfg BDSM entry now holds an 8-byte size integer as suggested by Gerd. Also renamed to etc/igd-bdsm-size. Filter based on bdf to only make use of this for the Intel VGA device at address 00:02.0, not that QEMU should attach this to anything else. As always, comments appreciated. I expect this will be on hold pending the QEMU support: http://thread.gmane.org/gmane.comp.emulators.kvm.devel/152123 If there's a better way to sync these projects, please let me know. Thanks, Alex src/fw/pciinit.c | 48 ++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) -- To unsubscribe from this list: send the line "unsubscribe kvm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/src/fw/pciinit.c b/src/fw/pciinit.c index 35d9902..08221e6 100644 --- a/src/fw/pciinit.c +++ b/src/fw/pciinit.c @@ -287,6 +287,50 @@ static void ich9_smbus_setup(struct pci_device *dev, void *arg) ich9_smbus_enable(dev->bdf); } +static void intel_igd_setup(struct pci_device *dev, void *arg) +{ + struct romfile_s *opregion = romfile_find("etc/igd-opregion"); + u64 bdsm_size = le64_to_cpu(romfile_loadint("etc/igd-bdsm-size", 0)); + void *addr; + u16 bdf = dev->bdf; + + /* Apply OpRegion to any Intel VGA device, more than one is undefined */ + if (opregion && opregion->size) { + addr = memalign_high(PAGE_SIZE, opregion->size); + if (!addr) { + warn_noalloc(); + return; + } + + if (opregion->copy(opregion, addr, opregion->size) < 0) { + free(addr); + return; + } + + pci_config_writel(bdf, 0xFC, cpu_to_le32((u32)addr)); + + dprintf(1, "Intel IGD OpRegion enabled at 0x%08x, size %dKB, dev " + "%02x:%02x.%x\n", (u32)addr, opregion->size >> 10, + pci_bdf_to_bus(bdf), pci_bdf_to_dev(bdf), pci_bdf_to_fn(bdf)); + } + + /* Apply BDSM only to Intel VGA at 00:02.0 */ + if (bdsm_size && (bdf == pci_to_bdf(0, 2, 0))) { + addr = memalign_tmphigh(1024 * 1024, bdsm_size); + if (!addr) { + warn_noalloc(); + return; + } + + e820_add((u32)addr, bdsm_size, E820_RESERVED); + + pci_config_writel(bdf, 0x5C, cpu_to_le32((u32)addr)); + + dprintf(1, "Intel IGD BDSM enabled at 0x%08x, size %lldMB, dev " + "00:02.0\n", (u32)addr, bdsm_size >> 20); + } +} + static const struct pci_device_id pci_device_tbl[] = { /* PIIX3/PIIX4 PCI to ISA bridge */ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371SB_0, @@ -320,6 +364,10 @@ static const struct pci_device_id pci_device_tbl[] = { PCI_DEVICE_CLASS(PCI_VENDOR_ID_APPLE, 0x0017, 0xff00, apple_macio_setup), PCI_DEVICE_CLASS(PCI_VENDOR_ID_APPLE, 0x0022, 0xff00, apple_macio_setup), + /* Intel IGD OpRegion setup */ + PCI_DEVICE_CLASS(PCI_VENDOR_ID_INTEL, PCI_ANY_ID, PCI_CLASS_DISPLAY_VGA, + intel_igd_setup), + PCI_DEVICE_END, };