From patchwork Fri Feb 3 14:56:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoffer Dall X-Patchwork-Id: 9554279 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 2905660424 for ; Fri, 3 Feb 2017 14:57:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0F2E727F95 for ; Fri, 3 Feb 2017 14:57:06 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 038612823D; Fri, 3 Feb 2017 14:57:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A4A0927F95 for ; Fri, 3 Feb 2017 14:57:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752264AbdBCO5D (ORCPT ); Fri, 3 Feb 2017 09:57:03 -0500 Received: from mail-wm0-f41.google.com ([74.125.82.41]:37997 "EHLO mail-wm0-f41.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751605AbdBCO5C (ORCPT ); Fri, 3 Feb 2017 09:57:02 -0500 Received: by mail-wm0-f41.google.com with SMTP id r141so31150643wmg.1 for ; Fri, 03 Feb 2017 06:57:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SFSCbWMzzPJtvovEcFC/Zy7yojclG6C+88nKDHuuxjg=; b=klWKn6tpAzXcD+FH3DIPlqnSpLq2pcjPWyjbFg6WwTYj8ArozS0DfDGgnnS4GTl9Wz 90FK4jeoylKiHve0Iayu3r/11L0mURNbiZylLHl9xrArV4QxywwkZdwo7Z/+1tgLfOfZ SI5U381M71gxS2c3Tgz4otnEX4KAW+pTYSyDk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SFSCbWMzzPJtvovEcFC/Zy7yojclG6C+88nKDHuuxjg=; b=TPC6Du0ALiw/S7hKNdReemO4hXKjhUV59cX2TJIzjwfkpS1lwcR9aw8tb/ALqOCWNJ DgwMz0OphMt4DO8Gjfkcf4Afav4Y+MRwz5WxhIT+SqpDbi47xE2drwfws4JkXbE31x21 Er71gNldrK4jdjjr/gNKafki+QiH9r+ZM2Ey0MQiVxZwqGjYc5HjMffFZqaGEcg42B7B 8AFv2saPl6dPM2/qDJvQaKccFxSe0Xcq8OqpITwx62LyAR9BPmGZPyTmc2UYOmB+YgrC DpK0KkMFqQ/pm5036WAU6VQx1rv3BwUNwI878b4IHC28pYQ2S1DGEisjDR29edP90pRt EuOA== X-Gm-Message-State: AMke39m9IcGd3DkOGD2tYHTunm6J3B0niGHjbW75SusiZ+bFxs2dxQZnnnS41MfDL8O068Ab X-Received: by 10.28.170.211 with SMTP id t202mr1868399wme.71.1486133820093; Fri, 03 Feb 2017 06:57:00 -0800 (PST) Received: from localhost.localdomain ([217.61.220.40]) by smtp.gmail.com with ESMTPSA id n13sm45466469wrn.40.2017.02.03.06.56.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 03 Feb 2017 06:56:59 -0800 (PST) From: Christoffer Dall To: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Cc: kvm@vger.kernel.org, Marc Zyngier , Alexander Graf , Peter Maydell , Pekka Enberg , Christoffer Dall Subject: [PATCH v2 1/5] KVM: arm/arm64: Cleanup the arch timer code's irqchip checking Date: Fri, 3 Feb 2017 15:56:51 +0100 Message-Id: <20170203145655.15007-2-cdall@linaro.org> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20170203145655.15007-1-cdall@linaro.org> References: <20170203145655.15007-1-cdall@linaro.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Christoffer Dall Currently we check if we have an in-kernel irqchip and if the vgic was properly implemented several places in the arch timer code. But, we already predicate our enablement of the arm timers on having a valid and initialized gic, so we can simply check if the timers are enabled or not. This also gets rid of the ugly "error that's not an error but used to signal that the timer shouldn't poke the gic" construct we have. Signed-off-by: Christoffer Dall --- virt/kvm/arm/arch_timer.c | 14 ++++++-------- 1 file changed, 6 insertions(+), 8 deletions(-) diff --git a/virt/kvm/arm/arch_timer.c b/virt/kvm/arm/arch_timer.c index 35d7100..5099b30 100644 --- a/virt/kvm/arm/arch_timer.c +++ b/virt/kvm/arm/arch_timer.c @@ -189,8 +189,6 @@ static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level, { int ret; - BUG_ON(!vgic_initialized(vcpu->kvm)); - timer_ctx->active_cleared_last = false; timer_ctx->irq.level = new_level; trace_kvm_timer_update_irq(vcpu->vcpu_id, timer_ctx->irq.irq, @@ -205,7 +203,7 @@ static void kvm_timer_update_irq(struct kvm_vcpu *vcpu, bool new_level, * Check if there was a change in the timer state (should we raise or lower * the line level to the GIC). */ -static int kvm_timer_update_state(struct kvm_vcpu *vcpu) +static void kvm_timer_update_state(struct kvm_vcpu *vcpu) { struct arch_timer_cpu *timer = &vcpu->arch.timer_cpu; struct arch_timer_context *vtimer = vcpu_vtimer(vcpu); @@ -217,16 +215,14 @@ static int kvm_timer_update_state(struct kvm_vcpu *vcpu) * because the guest would never see the interrupt. Instead wait * until we call this function from kvm_timer_flush_hwstate. */ - if (!vgic_initialized(vcpu->kvm) || !timer->enabled) - return -ENODEV; + if (!timer->enabled) + return; if (kvm_timer_should_fire(vtimer) != vtimer->irq.level) kvm_timer_update_irq(vcpu, !vtimer->irq.level, vtimer); if (kvm_timer_should_fire(ptimer) != ptimer->irq.level) kvm_timer_update_irq(vcpu, !ptimer->irq.level, ptimer); - - return 0; } /* Schedule the background timer for the emulated timer. */ @@ -299,9 +295,11 @@ void kvm_timer_flush_hwstate(struct kvm_vcpu *vcpu) bool phys_active; int ret; - if (kvm_timer_update_state(vcpu)) + if (unlikely(!timer->enabled)) return; + kvm_timer_update_state(vcpu); + /* Set the background timer for the physical timer emulation. */ kvm_timer_emulate(vcpu, vcpu_ptimer(vcpu));