diff mbox

KVM: PPC: Book3S HV: Add workaround for msgsync erratum on POWER9 DD1

Message ID 20170405062611.GB26143@fergus.ozlabs.ibm.com (mailing list archive)
State New, archived
Headers show

Commit Message

Paul Mackerras April 5, 2017, 6:26 a.m. UTC
On POWER9 DD1 the msgsync instruction doesn't work correctly, but the
new 'darn' (deliver a random number) instruction happens to do an
equivalent function as a side effect.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
---
 arch/powerpc/kvm/book3s_hv_rmhandlers.S | 4 ++++
 1 file changed, 4 insertions(+)
diff mbox

Patch

diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 6cadda5fa7d4..35d8d718e34b 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -1240,7 +1240,11 @@  END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
 	cmpwi	r12, BOOK3S_INTERRUPT_H_DOORBELL
 	bne	3f
 BEGIN_FTR_SECTION
+BEGIN_FTR_SECTION_NESTED(98)
 	PPC_MSGSYNC
+FTR_SECTION_ELSE_NESTED(98)	
+	.long	(31<<26) + (755<<1)	/* darn r0,0 */
+ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_POWER9_DD1, 98)
 	lwsync
 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300)
 	lbz	r0, HSTATE_HOST_IPI(r13)