From patchwork Mon Jul 17 14:27:00 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christoffer Dall X-Patchwork-Id: 9845243 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id B1FCA60386 for ; Mon, 17 Jul 2017 14:27:30 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A54F528509 for ; Mon, 17 Jul 2017 14:27:30 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9A07D2851E; Mon, 17 Jul 2017 14:27:30 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0CC4328509 for ; Mon, 17 Jul 2017 14:27:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751374AbdGQO12 (ORCPT ); Mon, 17 Jul 2017 10:27:28 -0400 Received: from mail-wm0-f45.google.com ([74.125.82.45]:36062 "EHLO mail-wm0-f45.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751300AbdGQO10 (ORCPT ); Mon, 17 Jul 2017 10:27:26 -0400 Received: by mail-wm0-f45.google.com with SMTP id t70so17255095wmt.1 for ; Mon, 17 Jul 2017 07:27:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Ai3UCRlElRWL+1n2BiHMWk250eU7bhhoIuHDpKcAXkA=; b=RP/zNueRZDEcVJo3aVpsHG5GoZJFcJTLmvyLx4YiVcwujxiuCGyJfmn0eDKLC9ny0u p1llIWN5/BONb6UStqLC9OnHWd9Y8TdegyXO1F6tTU9UBpoCalXHhHTcZJc6kFTMYnmN S6gIgjsWtVJN11R7EFWCisY0PeZa/nDu+PNrA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Ai3UCRlElRWL+1n2BiHMWk250eU7bhhoIuHDpKcAXkA=; b=FeCozSrnoBT/veNPzyF4loMd6Y7mU5B6oZ1pfRh47lWfMc9rRENOnue0sSTVEqg4/z E4d7AuHKdrv+oCj0uJ9u2TE3NbcJNAw+7Rz2mHVgInWuN0iq3nizSbCwtpfVkRHUvxTx 90SmAb+fSGaEjb3IEVDBrFHpYx1yC38jgMeXT7+5gmjFquX/Y/ucQITm7Jp5Jek72Jyf QIQrWaDAF1UXGIM5vianC5leXOHgHUa8xyw/UBCaEeNVcR0z5c3bujOdOH3ZxV1tOc5B 5oK1CTOl1Zd1jIJ5C4mcrcx9MPwZL1ErYWTq5eioFEVkYiZlgqwgdGNi/NpwaUNINBOh hTIg== X-Gm-Message-State: AIVw112ko/cSeOFYvm+Ju0kw1eE28bwoiXAXup6RTIFgElSLLXD9htLl WHgoCDeUcJpb+muh X-Received: by 10.80.182.90 with SMTP id c26mr17981144ede.55.1500301645054; Mon, 17 Jul 2017 07:27:25 -0700 (PDT) Received: from localhost.localdomain (xd93ddc2d.cust.hiper.dk. [217.61.220.45]) by smtp.gmail.com with ESMTPSA id b30sm9428952edd.6.2017.07.17.07.27.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 17 Jul 2017 07:27:24 -0700 (PDT) From: Christoffer Dall To: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Cc: kvm@vger.kernel.org, Marc Zyngier , Christoffer Dall Subject: [RFC PATCH v2 01/19] arm64: Use physical counter for in-kernel reads Date: Mon, 17 Jul 2017 16:27:00 +0200 Message-Id: <20170717142718.13853-2-cdall@linaro.org> X-Mailer: git-send-email 2.9.0 In-Reply-To: <20170717142718.13853-1-cdall@linaro.org> References: <20170717142718.13853-1-cdall@linaro.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Using the physical counter allows KVM to retain the offset between the virtual and physical counter as long as it is actively running a VCPU. As soon as a VCPU is released, another thread is scheduled or we start running userspace applications, we reset the offset to 0, so that userspace accessing the virtual timer can still read the cirtual counter and get the same view of time as the kernel. This opens up potential improvements for KVM performance. VHE kernels or kernels continuing to use the virtual timer should be unaffected. Signed-off-by: Christoffer Dall --- arch/arm64/include/asm/arch_timer.h | 6 ++++-- drivers/clocksource/arm_arch_timer.c | 3 +-- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h index 74d08e4..ee5619b 100644 --- a/arch/arm64/include/asm/arch_timer.h +++ b/arch/arm64/include/asm/arch_timer.h @@ -148,11 +148,13 @@ static inline void arch_timer_set_cntkctl(u32 cntkctl) static inline u64 arch_counter_get_cntpct(void) { + u64 cval; /* * AArch64 kernel and user space mandate the use of CNTVCT. */ - BUG(); - return 0; + isb(); + asm volatile("mrs %0, cntpct_el0" : "=r" (cval)); + return cval; } static inline u64 arch_counter_get_cntvct(void) diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index aae87c4..c24327c 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -886,8 +886,7 @@ static void __init arch_counter_register(unsigned type) /* Register the CP15 based counter if we have one */ if (type & ARCH_TIMER_TYPE_CP15) { - if (IS_ENABLED(CONFIG_ARM64) || - arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI) + if (arch_timer_uses_ppi == ARCH_TIMER_VIRT_PPI) arch_timer_read_counter = arch_counter_get_cntvct; else arch_timer_read_counter = arch_counter_get_cntpct;