From patchwork Thu Oct 12 00:37:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Haozhong Zhang X-Patchwork-Id: 10000781 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id F0C4D60244 for ; Thu, 12 Oct 2017 00:37:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CBA1128BEB for ; Thu, 12 Oct 2017 00:37:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AF4AE28BFE; Thu, 12 Oct 2017 00:37:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3DBDD28BEB for ; Thu, 12 Oct 2017 00:37:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752011AbdJLAh2 (ORCPT ); Wed, 11 Oct 2017 20:37:28 -0400 Received: from mga01.intel.com ([192.55.52.88]:3810 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751701AbdJLAh1 (ORCPT ); Wed, 11 Oct 2017 20:37:27 -0400 Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Oct 2017 17:37:27 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.43,363,1503385200"; d="scan'208";a="137623647" Received: from hz-desktop.sh.intel.com (HELO localhost) ([10.239.159.142]) by orsmga004.jf.intel.com with ESMTP; 11 Oct 2017 17:37:25 -0700 From: Haozhong Zhang To: kvm@vger.kernel.org Cc: Paolo Bonzini , =?UTF-8?q?Radim=20Kr=C4=8Dm=C3=A1=C5=99?= , Nadav Amit , Haozhong Zhang Subject: [kvm-unit-tests PATCH v2] x86: vmx: add test for L1 CR4 load Date: Thu, 12 Oct 2017 08:37:13 +0800 Message-Id: <20171012003713.30336-1-haozhong.zhang@intel.com> X-Mailer: git-send-email 2.11.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Test whether KVM loads the correct L1 CR4 as guest CR4 when emulating L2 to L1 exit. Signed-off-by: Haozhong Zhang --- Changes in v2: * Add an entry in x86/unittests.cfg. (Paolo) * Fix X86_FEATURE_MCE check. (Nadav) --- lib/x86/processor.h | 2 ++ x86/vmx_tests.c | 57 +++++++++++++++++++++++++++++++++++++++++++++++++++++ x86/unittests.cfg | 6 ++++++ 3 files changed, 65 insertions(+) diff --git a/lib/x86/processor.h b/lib/x86/processor.h index e658d83..2473862 100644 --- a/lib/x86/processor.h +++ b/lib/x86/processor.h @@ -21,10 +21,12 @@ #define X86_CR0_WP 0x00010000 #define X86_CR0_AM 0x00040000 #define X86_CR0_PG 0x80000000 +#define X86_CR3_PCID_MASK 0x00000fff #define X86_CR4_TSD 0x00000004 #define X86_CR4_DE 0x00000008 #define X86_CR4_PSE 0x00000010 #define X86_CR4_PAE 0x00000020 +#define X86_CR4_MCE 0x00000040 #define X86_CR4_VMXE 0x00002000 #define X86_CR4_PCIDE 0x00020000 #define X86_CR4_SMAP 0x00200000 diff --git a/x86/vmx_tests.c b/x86/vmx_tests.c index 4a3e94b..0107fcb 100644 --- a/x86/vmx_tests.c +++ b/x86/vmx_tests.c @@ -3668,6 +3668,62 @@ static void vmentry_movss_shadow_test(void) vmcs_write(GUEST_RFLAGS, X86_EFLAGS_FIXED); } +#define X86_FEATURE_PCID (1 << 17) +#define X86_FEATURE_MCE (1 << 7) + +static int write_cr4_checking(unsigned long val) +{ + asm volatile(ASM_TRY("1f") + "mov %0, %%cr4\n\t" + "1:": : "r" (val)); + return exception_vector(); +} + +static void vmx_cr4_load_test(void) +{ + struct cpuid _cpuid = cpuid(1); + unsigned long cr4 = read_cr4(), cr3 = read_cr3(); + + if (!(_cpuid.c & X86_FEATURE_PCID)) { + report_skip("PCID not detected"); + return; + } + if (!(_cpuid.d & X86_FEATURE_MCE)) { + report_skip("MCE not detected"); + return; + } + + TEST_ASSERT(!(cr4 & (X86_CR4_PCIDE | X86_CR4_MCE))); + TEST_ASSERT(!(cr3 & X86_CR3_PCID_MASK)); + + /* Enable PCID for L1. */ + cr4 |= X86_CR4_PCIDE; + cr3 |= 0x1; + TEST_ASSERT(!write_cr4_checking(cr4)); + write_cr3(cr3); + + test_set_guest(v2_null_test_guest); + vmcs_write(HOST_CR4, cr4); + vmcs_write(HOST_CR3, cr3); + enter_guest(); + + /* + * No exception is expected. + * + * NB. KVM loads the last guest write to CR4 into CR4 read + * shadow. In order to trigger an exit to KVM, we can set a + * bit that was zero in the above CR4 write and is owned by + * KVM. We choose to set CR4.MCE, which shall have no side + * effect because normally no guest MCE (e.g., as the result + * of bad memory) would happen during this test. + */ + TEST_ASSERT(!write_cr4_checking(cr4 | X86_CR4_MCE)); + + /* Cleanup L1 state: disable PCID. */ + write_cr3(cr3 & ~X86_CR3_PCID_MASK); + TEST_ASSERT(!write_cr4_checking(cr4 & ~X86_CR4_PCIDE)); +} + #define TEST(name) { #name, .v2 = name } /* name/init/guest_main/exit_handler/syscall_handler/guest_regs */ @@ -3734,5 +3790,6 @@ struct vmx_test vmx_tests[] = { /* VM-entry tests */ TEST(vmx_controls_test), TEST(vmentry_movss_shadow_test), + TEST(vmx_cr4_load_test), { NULL, NULL, NULL, NULL, NULL, {0} }, }; diff --git a/x86/unittests.cfg b/x86/unittests.cfg index cafba45..c9a564c 100644 --- a/x86/unittests.cfg +++ b/x86/unittests.cfg @@ -533,6 +533,12 @@ extra_params = -cpu host,+vmx -m 2048 -append vmentry_movss_shadow_test arch = x86_64 groups = vmx +[vmx_cr4_load_test] +file = vmx.flat +extra_params = -cpu host,+vmx -m 2048 -append vmx_cr4_load_test +arch = x86_64 +groups = vmx + [debug] file = debug.flat arch = x86_64