From patchwork Thu Feb 8 11:20:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chao Gao X-Patchwork-Id: 10207063 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 9EC7E600F6 for ; Thu, 8 Feb 2018 12:32:17 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 909C9294DB for ; Thu, 8 Feb 2018 12:32:17 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8533D294E2; Thu, 8 Feb 2018 12:32:17 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0643F294DB for ; Thu, 8 Feb 2018 12:32:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751941AbeBHMcC (ORCPT ); Thu, 8 Feb 2018 07:32:02 -0500 Received: from mga17.intel.com ([192.55.52.151]:45883 "EHLO mga17.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751725AbeBHMcB (ORCPT ); Thu, 8 Feb 2018 07:32:01 -0500 X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga107.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 08 Feb 2018 04:32:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,478,1511856000"; d="scan'208";a="29866918" Received: from skl-4s-chao.sh.intel.com ([10.239.48.67]) by orsmga001.jf.intel.com with ESMTP; 08 Feb 2018 04:31:58 -0800 Date: Thu, 8 Feb 2018 19:20:28 +0800 From: Chao Gao To: Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, x86@kernel.org, "H. Peter Anvin" , Ingo Molnar , Thomas Gleixner , Radim =?utf-8?B?S3LEjW3DocWZ?= , Liran Alon Subject: Re: [PATCH] x86/kvm/vmx: Don't halt vcpu when L1 is injecting events to L2 Message-ID: <20180208112027.GA116170@skl-4s-chao.sh.intel.com> References: <1518066816-7197-1-git-send-email-chao.gao@intel.com> <7de4e758-08cc-2c45-b0aa-dfe28dfef398@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <7de4e758-08cc-2c45-b0aa-dfe28dfef398@redhat.com> User-Agent: Mutt/1.8.0 (2017-02-23) Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP On Thu, Feb 08, 2018 at 11:29:49AM +0100, Paolo Bonzini wrote: >On 08/02/2018 06:13, Chao Gao wrote: >> Although L2 is in halt state, it will be in the active state after >> VM entry if the VM entry is vectoring. Halting the vcpu here means >> the event won't be injected to L2 and this decision isn't reported >> to L1. Thus L0 drops an event that should be injected to L2. >> >> Because virtual interrupt delivery may wake L2 vcpu, if VID is enabled, >> do the same thing -- don't halt L2. > >This second part seems wrong to me, or at least overly general. Perhaps >you mean if RVI>0? Yes. It is a little general. How about this patch: -- 8> -- Subject: [PATCH] x86/kvm/vmx: Don't halt vcpu when L1 is injecting events to L2 Although L2 is in halt state, it will be in the active state after VM entry if the VM entry is vectoring. Halting the vcpu here means the event won't be injected to L2 and this decision isn't reported to L1. Thus L0 drops an event that should be injected to L2. Because virtual interrupt delivery may wake L2 vcpu, if VID is enabled and RVI > 0, do the same thing -- don't halt L2. Signed-off-by: Chao Gao --- arch/x86/kvm/vmx.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- > >Thanks, > >Paolo > >> Signed-off-by: Chao Gao >> --- >> arch/x86/kvm/vmx.c | 10 ++++++++-- >> 1 file changed, 8 insertions(+), 2 deletions(-) >> >> diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c >> index bb5b488..e1fe4e4 100644 >> --- a/arch/x86/kvm/vmx.c >> +++ b/arch/x86/kvm/vmx.c >> @@ -10985,8 +10985,14 @@ static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch) >> if (ret) >> return ret; >> >> - if (vmcs12->guest_activity_state == GUEST_ACTIVITY_HLT) >> - return kvm_vcpu_halt(vcpu); >> + if (vmcs12->guest_activity_state == GUEST_ACTIVITY_HLT) { >> + u32 intr_info = vmcs_read32(VM_ENTRY_INTR_INFO_FIELD); >> + u32 exec_control = vmcs_read32(SECONDARY_VM_EXEC_CONTROL); >> + >> + if (!(intr_info & VECTORING_INFO_VALID_MASK) && >> + !(exec_control & SECONDARY_EXEC_VIRTUAL_INTR_DELIVERY)) >> + return kvm_vcpu_halt(vcpu); >> + } > >> vmx->nested.nested_run_pending = 1; >> >> > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c index bb5b488..fa889c8 100644 --- a/arch/x86/kvm/vmx.c +++ b/arch/x86/kvm/vmx.c @@ -10985,7 +10985,13 @@ static int nested_vmx_run(struct kvm_vcpu *vcpu, bool launch) if (ret) return ret; - if (vmcs12->guest_activity_state == GUEST_ACTIVITY_HLT) + /* + * If we're entering a halted L2 vcpu and the L2 vcpu won't be woken + * by event injection or VID, halt vcpu for optimization. + */ + if ((vmcs12->guest_activity_state == GUEST_ACTIVITY_HLT) && + !(vmcs12->vm_entry_intr_info_field & VECTORING_INFO_VALID_MASK) && + !(nested_cpu_has_vid(vmcs12) && (vmcs12->guest_intr_status & 0xff))) return kvm_vcpu_halt(vcpu); vmx->nested.nested_run_pending = 1;