From patchwork Mon Sep 17 16:30:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Emilio Cota X-Patchwork-Id: 10603013 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 71E2E15A6 for ; Mon, 17 Sep 2018 16:31:11 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5EF3F2A1F5 for ; Mon, 17 Sep 2018 16:31:11 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5D0E32A1FA; Mon, 17 Sep 2018 16:31:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 94C8F2A1FD for ; Mon, 17 Sep 2018 16:31:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728518AbeIQV7P (ORCPT ); Mon, 17 Sep 2018 17:59:15 -0400 Received: from wout2-smtp.messagingengine.com ([64.147.123.25]:38835 "EHLO wout2-smtp.messagingengine.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726979AbeIQV7O (ORCPT ); Mon, 17 Sep 2018 17:59:14 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.west.internal (Postfix) with ESMTP id C903E528; Mon, 17 Sep 2018 12:31:07 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Mon, 17 Sep 2018 12:31:08 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=mesmtp; bh=j9hsvzJFhqu1t3 56MXvX9tNnQpyp4xtxgE7CAt6NnmQ=; b=VahaF3tcAbej1qDWlkJqsmieiTtJqf tD3oS0WhBmLF6akG2LUsQEmz8YPQCIaCCulG0prSwnb4IpfcfMNC890icX4ho6qz 0EEWLKeiP379QDhw+vxwsoyjQz+NxohC/VkqP/3CvVLTBTFisWsVUZIm9pxHguDD bpACsEoLw9NXw= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm3; bh=j9hsvzJFhqu1t356MXvX9tNnQpyp4xtxgE7CAt6NnmQ=; b=uWWfdYN+ YLZbRs34dG+4wjuNxup3osL2wEbJ0CUbHIUCnHphVPevJu0RfOT7+kC+L5gmw8dU XXoDMfDD3VPrGZC7ElztI/WuKMQl8FwMY6UW0XqavSnYIMpB6Qzd2T2BgLts69TH rzf4TMm3/AfH/7TqfmxBtCT4dVySCQjqNFxnPLLNUINu2ozPaIvhwdfkkkA/Yqfw KG5keK+iAdh8O94otHggG0qhYbTPeoUr36uowV37H1/fluA2XPBWI+I6MUBKQsbz nvhKcP2TZJZF4l0ATO4jG1WRd/1K/K16toAgNseHBbZXWn/S/POoYKM/WwFoAePF m8+OTubONaTn7g== X-ME-Proxy: X-ME-Sender: Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id EC53DE4A42; Mon, 17 Sep 2018 12:31:06 -0400 (EDT) From: "Emilio G. Cota" To: qemu-devel@nongnu.org Cc: Paolo Bonzini , Richard Henderson , Eduardo Habkost , Marcelo Tosatti , kvm@vger.kernel.org Subject: [PATCH 11/35] target/i386: access cpu->interrupt_request with atomics Date: Mon, 17 Sep 2018 12:30:39 -0400 Message-Id: <20180917163103.6113-12-cota@braap.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180917163103.6113-1-cota@braap.org> References: <20180917163103.6113-1-cota@braap.org> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Paolo Bonzini Cc: Richard Henderson Cc: Eduardo Habkost Cc: Marcelo Tosatti Cc: kvm@vger.kernel.org Signed-off-by: Paolo Bonzini Signed-off-by: Emilio G. Cota --- target/i386/cpu.c | 7 ++++--- target/i386/helper.c | 4 ++-- target/i386/kvm.c | 44 +++++++++++++++++++++++----------------- target/i386/svm_helper.c | 4 ++-- 4 files changed, 33 insertions(+), 26 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index f24295e6e4..f98e6e4318 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -5433,15 +5433,16 @@ static bool x86_cpu_has_work(CPUState *cs) { X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; + int interrupt_request = atomic_read(&cs->interrupt_request); - return ((cs->interrupt_request & (CPU_INTERRUPT_HARD | + return ((interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_POLL)) && (env->eflags & IF_MASK)) || - (cs->interrupt_request & (CPU_INTERRUPT_NMI | + (interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_INIT | CPU_INTERRUPT_SIPI | CPU_INTERRUPT_MCE)) || - ((cs->interrupt_request & CPU_INTERRUPT_SMI) && + ((interrupt_request & CPU_INTERRUPT_SMI) && !(env->hflags & HF_SMM_MASK)); } diff --git a/target/i386/helper.c b/target/i386/helper.c index e695f8ba7a..ee9f24d853 100644 --- a/target/i386/helper.c +++ b/target/i386/helper.c @@ -1035,12 +1035,12 @@ void do_cpu_init(X86CPU *cpu) CPUState *cs = CPU(cpu); CPUX86State *env = &cpu->env; CPUX86State *save = g_new(CPUX86State, 1); - int sipi = cs->interrupt_request & CPU_INTERRUPT_SIPI; + int sipi = atomic_read(&cs->interrupt_request) & CPU_INTERRUPT_SIPI; *save = *env; cpu_reset(cs); - cs->interrupt_request = sipi; + atomic_mb_set(&cs->interrupt_request, sipi); memcpy(&env->start_init_save, &save->start_init_save, offsetof(CPUX86State, end_init_save) - offsetof(CPUX86State, start_init_save)); diff --git a/target/i386/kvm.c b/target/i386/kvm.c index 5dd66809b0..e40c8d5461 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -2707,8 +2707,10 @@ static int kvm_put_vcpu_events(X86CPU *cpu, int level) /* As soon as these are moved to the kernel, remove them * from cs->interrupt_request. */ - events.smi.pending = cs->interrupt_request & CPU_INTERRUPT_SMI; - events.smi.latched_init = cs->interrupt_request & CPU_INTERRUPT_INIT; + uint32_t interrupt_request = atomic_read(&cs->interrupt_request); + + events.smi.pending = interrupt_request & CPU_INTERRUPT_SMI; + events.smi.latched_init = interrupt_request & CPU_INTERRUPT_INIT; cpu_reset_interrupt(cs, CPU_INTERRUPT_INIT | CPU_INTERRUPT_SMI); } else { /* Keep these in cs->interrupt_request. */ @@ -2999,11 +3001,12 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) { X86CPU *x86_cpu = X86_CPU(cpu); CPUX86State *env = &x86_cpu->env; + int interrupt_request = atomic_read(&cpu->interrupt_request); int ret; /* Inject NMI */ - if (cpu->interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { - if (cpu->interrupt_request & CPU_INTERRUPT_NMI) { + if (interrupt_request & (CPU_INTERRUPT_NMI | CPU_INTERRUPT_SMI)) { + if (interrupt_request & CPU_INTERRUPT_NMI) { qemu_mutex_lock_iothread(); cpu_reset_interrupt(cpu, CPU_INTERRUPT_NMI); qemu_mutex_unlock_iothread(); @@ -3014,7 +3017,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) strerror(-ret)); } } - if (cpu->interrupt_request & CPU_INTERRUPT_SMI) { + if (atomic_read(&cpu->interrupt_request) & CPU_INTERRUPT_SMI) { qemu_mutex_lock_iothread(); cpu_reset_interrupt(cpu, CPU_INTERRUPT_SMI); qemu_mutex_unlock_iothread(); @@ -3035,12 +3038,12 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) * or (for userspace APIC, but it is cheap to combine the checks here) * pending TPR access reports. */ - if (cpu->interrupt_request & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) { - if ((cpu->interrupt_request & CPU_INTERRUPT_INIT) && + if (interrupt_request & (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) { + if ((interrupt_request & CPU_INTERRUPT_INIT) && !(env->hflags & HF_SMM_MASK)) { cpu->exit_request = 1; } - if (cpu->interrupt_request & CPU_INTERRUPT_TPR) { + if (interrupt_request & CPU_INTERRUPT_TPR) { cpu->exit_request = 1; } } @@ -3048,11 +3051,12 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) if (!kvm_pic_in_kernel()) { /* Try to inject an interrupt if the guest can accept it */ if (run->ready_for_interrupt_injection && - (cpu->interrupt_request & CPU_INTERRUPT_HARD) && + (interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) { int irq; cpu_reset_interrupt(cpu, CPU_INTERRUPT_HARD); + interrupt_request &= ~CPU_INTERRUPT_HARD; irq = cpu_get_pic_interrupt(env); if (irq >= 0) { struct kvm_interrupt intr; @@ -3072,7 +3076,7 @@ void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run) * interrupt, request an interrupt window exit. This will * cause a return to userspace as soon as the guest is ready to * receive interrupts. */ - if ((cpu->interrupt_request & CPU_INTERRUPT_HARD)) { + if (interrupt_request & CPU_INTERRUPT_HARD) { run->request_interrupt_window = 1; } else { run->request_interrupt_window = 0; @@ -3118,8 +3122,9 @@ int kvm_arch_process_async_events(CPUState *cs) { X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; + int interrupt_request = atomic_read(&cs->interrupt_request); - if (cs->interrupt_request & CPU_INTERRUPT_MCE) { + if (interrupt_request & CPU_INTERRUPT_MCE) { /* We must not raise CPU_INTERRUPT_MCE if it's not supported. */ assert(env->mcg_cap); @@ -3142,7 +3147,7 @@ int kvm_arch_process_async_events(CPUState *cs) } } - if ((cs->interrupt_request & CPU_INTERRUPT_INIT) && + if ((interrupt_request & CPU_INTERRUPT_INIT) && !(env->hflags & HF_SMM_MASK)) { kvm_cpu_synchronize_state(cs); do_cpu_init(cpu); @@ -3152,20 +3157,20 @@ int kvm_arch_process_async_events(CPUState *cs) return 0; } - if (cs->interrupt_request & CPU_INTERRUPT_POLL) { + if (interrupt_request & CPU_INTERRUPT_POLL) { cpu_reset_interrupt(cs, CPU_INTERRUPT_POLL); apic_poll_irq(cpu->apic_state); } - if (((cs->interrupt_request & CPU_INTERRUPT_HARD) && + if (((interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) || - (cs->interrupt_request & CPU_INTERRUPT_NMI)) { + (interrupt_request & CPU_INTERRUPT_NMI)) { cs->halted = 0; } - if (cs->interrupt_request & CPU_INTERRUPT_SIPI) { + if (interrupt_request & CPU_INTERRUPT_SIPI) { kvm_cpu_synchronize_state(cs); do_cpu_sipi(cpu); } - if (cs->interrupt_request & CPU_INTERRUPT_TPR) { + if (interrupt_request & CPU_INTERRUPT_TPR) { cpu_reset_interrupt(cs, CPU_INTERRUPT_TPR); kvm_cpu_synchronize_state(cs); apic_handle_tpr_access_report(cpu->apic_state, env->eip, @@ -3179,10 +3184,11 @@ static int kvm_handle_halt(X86CPU *cpu) { CPUState *cs = CPU(cpu); CPUX86State *env = &cpu->env; + int interrupt_request = atomic_read(&cs->interrupt_request); - if (!((cs->interrupt_request & CPU_INTERRUPT_HARD) && + if (!((interrupt_request & CPU_INTERRUPT_HARD) && (env->eflags & IF_MASK)) && - !(cs->interrupt_request & CPU_INTERRUPT_NMI)) { + !(interrupt_request & CPU_INTERRUPT_NMI)) { cs->halted = 1; return EXCP_HLT; } diff --git a/target/i386/svm_helper.c b/target/i386/svm_helper.c index c532639574..e18e53c869 100644 --- a/target/i386/svm_helper.c +++ b/target/i386/svm_helper.c @@ -316,7 +316,7 @@ void helper_vmrun(CPUX86State *env, int aflag, int next_eip_addend) if (int_ctl & V_IRQ_MASK) { CPUState *cs = CPU(x86_env_get_cpu(env)); - cs->interrupt_request |= CPU_INTERRUPT_VIRQ; + atomic_or(&cs->interrupt_request, CPU_INTERRUPT_VIRQ); } /* maybe we need to inject an event */ @@ -674,7 +674,7 @@ void do_vmexit(CPUX86State *env, uint32_t exit_code, uint64_t exit_info_1) env->vm_vmcb + offsetof(struct vmcb, control.int_ctl)); int_ctl &= ~(V_TPR_MASK | V_IRQ_MASK); int_ctl |= env->v_tpr & V_TPR_MASK; - if (cs->interrupt_request & CPU_INTERRUPT_VIRQ) { + if (atomic_read(&cs->interrupt_request) & CPU_INTERRUPT_VIRQ) { int_ctl |= V_IRQ_MASK; } x86_stl_phys(cs,