From patchwork Thu May 23 10:34:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 10957291 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 6666113AD for ; Thu, 23 May 2019 10:35:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4E9E828433 for ; Thu, 23 May 2019 10:35:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4302528455; Thu, 23 May 2019 10:35:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BF03A28433 for ; Thu, 23 May 2019 10:35:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730642AbfEWKfk (ORCPT ); Thu, 23 May 2019 06:35:40 -0400 Received: from usa-sjc-mx-foss1.foss.arm.com ([217.140.101.70]:43094 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730631AbfEWKfk (ORCPT ); Thu, 23 May 2019 06:35:40 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AAF9515AB; Thu, 23 May 2019 03:35:39 -0700 (PDT) Received: from usa.arm.com (e107155-lin.cambridge.arm.com [10.1.196.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 958D83F718; Thu, 23 May 2019 03:35:37 -0700 (PDT) From: Sudeep Holla To: kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Cc: Sudeep Holla , kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Christoffer Dall , Marc Zyngier , James Morse , Suzuki K Pouloze , Catalin Marinas , Will Deacon , Julien Thierry Subject: [PATCH v2 08/15] arm64: KVM/debug: drop pmscr_el1 and use sys_regs[PMSCR_EL1] in kvm_cpu_context Date: Thu, 23 May 2019 11:34:55 +0100 Message-Id: <20190523103502.25925-9-sudeep.holla@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190523103502.25925-1-sudeep.holla@arm.com> References: <20190523103502.25925-1-sudeep.holla@arm.com> Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP kvm_cpu_context now has support to stash the complete SPE buffer control context. We no longer need the pmscr_el1 kvm_vcpu_arch and it can be dropped. Signed-off-by: Sudeep Holla --- arch/arm64/include/asm/kvm_host.h | 2 -- arch/arm64/kvm/hyp/debug-sr.c | 26 +++++++++++++++----------- 2 files changed, 15 insertions(+), 13 deletions(-) diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index 559aa6931291..6921fdfd477b 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -310,8 +310,6 @@ struct kvm_vcpu_arch { struct { /* {Break,watch}point registers */ struct kvm_guest_debug_arch regs; - /* Statistical profiling extension */ - u64 pmscr_el1; } host_debug_state; /* VGIC state */ diff --git a/arch/arm64/kvm/hyp/debug-sr.c b/arch/arm64/kvm/hyp/debug-sr.c index 618884df1dc4..a2714a5eb3e9 100644 --- a/arch/arm64/kvm/hyp/debug-sr.c +++ b/arch/arm64/kvm/hyp/debug-sr.c @@ -66,19 +66,19 @@ default: write_debug(ptr[0], reg, 0); \ } -static void __hyp_text __debug_save_spe_nvhe(u64 *pmscr_el1) +static void __hyp_text __debug_save_spe_nvhe(struct kvm_cpu_context *ctxt) { u64 reg; /* Clear pmscr in case of early return */ - *pmscr_el1 = 0; + ctxt->sys_regs[PMSCR_EL1] = 0; /* SPE present on this CPU? */ if (!cpuid_feature_extract_unsigned_field(read_sysreg(id_aa64dfr0_el1), ID_AA64DFR0_PMSVER_SHIFT)) return; - /* Yes; is it owned by EL3? */ + /* Yes; is it owned by higher EL? */ reg = read_sysreg_s(SYS_PMBIDR_EL1); if (reg & BIT(SYS_PMBIDR_EL1_P_SHIFT)) return; @@ -89,7 +89,7 @@ static void __hyp_text __debug_save_spe_nvhe(u64 *pmscr_el1) return; /* Yes; save the control register and disable data generation */ - *pmscr_el1 = read_sysreg_el1_s(SYS_PMSCR); + ctxt->sys_regs[PMSCR_EL1] = read_sysreg_el1_s(SYS_PMSCR); write_sysreg_el1_s(0, SYS_PMSCR); isb(); @@ -98,16 +98,16 @@ static void __hyp_text __debug_save_spe_nvhe(u64 *pmscr_el1) dsb(nsh); } -static void __hyp_text __debug_restore_spe_nvhe(u64 pmscr_el1) +static void __hyp_text __debug_restore_spe_nvhe(struct kvm_cpu_context *ctxt) { - if (!pmscr_el1) + if (!ctxt->sys_regs[PMSCR_EL1]) return; /* The host page table is installed, but not yet synchronised */ isb(); /* Re-enable data generation */ - write_sysreg_el1_s(pmscr_el1, SYS_PMSCR); + write_sysreg_el1_s(ctxt->sys_regs[PMSCR_EL1], SYS_PMSCR); } static void __hyp_text __debug_save_state(struct kvm_vcpu *vcpu, @@ -175,14 +175,15 @@ void __hyp_text __debug_restore_host_context(struct kvm_vcpu *vcpu) struct kvm_guest_debug_arch *host_dbg; struct kvm_guest_debug_arch *guest_dbg; + host_ctxt = kern_hyp_va(vcpu->arch.host_cpu_context); + guest_ctxt = &vcpu->arch.ctxt; + if (!has_vhe()) - __debug_restore_spe_nvhe(vcpu->arch.host_debug_state.pmscr_el1); + __debug_restore_spe_nvhe(host_ctxt); if (!(vcpu->arch.flags & KVM_ARM64_DEBUG_DIRTY)) return; - host_ctxt = kern_hyp_va(vcpu->arch.host_cpu_context); - guest_ctxt = &vcpu->arch.ctxt; host_dbg = &vcpu->arch.host_debug_state.regs; guest_dbg = kern_hyp_va(vcpu->arch.debug_ptr); @@ -198,8 +199,11 @@ void __hyp_text __debug_save_host_context(struct kvm_vcpu *vcpu) * Non-VHE: Disable and flush SPE data generation * VHE: The vcpu can run, but it can't hide. */ + struct kvm_cpu_context *host_ctxt; + + host_ctxt = kern_hyp_va(vcpu->arch.host_cpu_context); if (!has_vhe()) - __debug_save_spe_nvhe(&vcpu->arch.host_debug_state.pmscr_el1); + __debug_save_spe_nvhe(host_ctxt); } void __hyp_text __debug_save_guest_context(struct kvm_vcpu *vcpu)