From patchwork Mon Sep 9 13:47:55 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 11137969 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 47CB014E5 for ; Mon, 9 Sep 2019 13:49:05 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1A9D22196E for ; Mon, 9 Sep 2019 13:49:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1568036945; bh=4+Ob16ejLDbmgrK0zm38KixtnU6OyZfuzlAn5+qwvr8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:List-ID:From; b=TcCV1vccwkHExFU1msYXBwWUh42d0CdG9TV8NzSGDVmWqyZOmWsfyL2DzlSW+d9fB x31ea/xYNGJa7ZE0B1ojLjKmz1ZD9E4VCfPo2sdav7B49ZO6iaUbXoxePUREPFcwtM M/S0yiTTOHL+kAVQg+Da0VxPypRJXKWjF1Nu2/Ig= Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731312AbfIINtE (ORCPT ); Mon, 9 Sep 2019 09:49:04 -0400 Received: from foss.arm.com ([217.140.110.172]:50586 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731247AbfIINtE (ORCPT ); Mon, 9 Sep 2019 09:49:04 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8C6971688; Mon, 9 Sep 2019 06:49:03 -0700 (PDT) Received: from localhost.localdomain (unknown [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 587723F59C; Mon, 9 Sep 2019 06:49:01 -0700 (PDT) From: Marc Zyngier To: Paolo Bonzini , =?utf-8?b?UmFkaW0gS3LEjW3DocWZ?= Cc: Alexandru Elisei , Andre Przywara , Eric Auger , James Morse , Mark Rutland , Zenghui Yu , kvm@vger.kernel.org, kvmarm@lists.cs.columbia.edu, linux-arm-kernel@lists.infradead.org Subject: [PATCH 05/17] KVM: arm/arm64: vgic-its: Invalidate MSI-LPI translation cache on disabling LPIs Date: Mon, 9 Sep 2019 14:47:55 +0100 Message-Id: <20190909134807.27978-6-maz@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190909134807.27978-1-maz@kernel.org> References: <20190909134807.27978-1-maz@kernel.org> MIME-Version: 1.0 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org If a vcpu disables LPIs at its redistributor level, we need to make sure we won't pend more interrupts. For this, we need to invalidate the LPI translation cache. Tested-by: Andre Przywara Reviewed-by: Eric Auger Signed-off-by: Marc Zyngier --- virt/kvm/arm/vgic/vgic-mmio-v3.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/virt/kvm/arm/vgic/vgic-mmio-v3.c b/virt/kvm/arm/vgic/vgic-mmio-v3.c index c45e2d7e942f..fdcfb7ae4491 100644 --- a/virt/kvm/arm/vgic/vgic-mmio-v3.c +++ b/virt/kvm/arm/vgic/vgic-mmio-v3.c @@ -192,8 +192,10 @@ static void vgic_mmio_write_v3r_ctlr(struct kvm_vcpu *vcpu, vgic_cpu->lpis_enabled = val & GICR_CTLR_ENABLE_LPIS; - if (was_enabled && !vgic_cpu->lpis_enabled) + if (was_enabled && !vgic_cpu->lpis_enabled) { vgic_flush_pending_lpis(vcpu); + vgic_its_invalidate_cache(vcpu->kvm); + } if (!was_enabled && vgic_cpu->lpis_enabled) vgic_enable_lpis(vcpu);