diff mbox series

[RFC,10/13] x86/mm: Add NR page bit for KVM XO

Message ID 20191003212400.31130-11-rick.p.edgecombe@intel.com (mailing list archive)
State New, archived
Headers show
Series XOM for KVM guest userspace | expand

Commit Message

Edgecombe, Rick P Oct. 3, 2019, 9:23 p.m. UTC 
Add _PAGE_BIT_NR and _PAGE_NR, the values of which are determined
dynamically at boot. This page type is only valid after checking for for
the KVM XO CPUID bit.

Signed-off-by: Rick Edgecombe <rick.p.edgecombe@intel.com>
---
 arch/x86/include/asm/pgtable_types.h | 11 +++++++++++
 arch/x86/mm/init.c                   |  3 +++
 2 files changed, 14 insertions(+)

Comments

Paolo Bonzini Oct. 4, 2019, 7:33 a.m. UTC | #1 
On 03/10/19 23:23, Rick Edgecombe wrote:
> +/* KVM based not-readable: only valid after cpuid check */
> +#define _PAGE_BIT_NR		(__pgtable_kvmxo_bit)
> +#else /* defined(CONFIG_KVM_XO) && !defined(__ASSEMBLY__) */
> +#define _PAGE_BIT_NR		0
> +#endif /* defined(CONFIG_KVM_XO) && !defined(__ASSEMBLY__) */

Please do not #define _PAGE_BIT_NR and _PAGE_NR, so that it's clear that
they are variables.

Paolo
diff mbox series

Patch

diff --git a/arch/x86/include/asm/pgtable_types.h b/arch/x86/include/asm/pgtable_types.h
index b5e49e6bac63..d3c92c992089 100644
--- a/arch/x86/include/asm/pgtable_types.h
+++ b/arch/x86/include/asm/pgtable_types.h
@@ -30,6 +30,14 @@ 
 #define _PAGE_BIT_PKEY_BIT3	62	/* Protection Keys, bit 4/4 */
 #define _PAGE_BIT_NX		63	/* No execute: only valid after cpuid check */
 
+#if defined(CONFIG_KVM_XO) && !defined(__ASSEMBLY__)
+extern unsigned int __pgtable_kvmxo_bit;
+/* KVM based not-readable: only valid after cpuid check */
+#define _PAGE_BIT_NR		(__pgtable_kvmxo_bit)
+#else /* defined(CONFIG_KVM_XO) && !defined(__ASSEMBLY__) */
+#define _PAGE_BIT_NR		0
+#endif /* defined(CONFIG_KVM_XO) && !defined(__ASSEMBLY__) */
+
 #define _PAGE_BIT_SPECIAL	_PAGE_BIT_SOFTW1
 #define _PAGE_BIT_CPA_TEST	_PAGE_BIT_SOFTW1
 #define _PAGE_BIT_SOFT_DIRTY	_PAGE_BIT_SOFTW3 /* software dirty tracking */
@@ -39,6 +47,9 @@ 
 /* - if the user mapped it with PROT_NONE; pte_present gives true */
 #define _PAGE_BIT_PROTNONE	_PAGE_BIT_GLOBAL
 
+#define _PAGE_NR	(pgtable_kvmxo_enabled() ? \
+			(_AT(pteval_t, 1) << _PAGE_BIT_NR) : 0)
+
 #define _PAGE_PRESENT	(_AT(pteval_t, 1) << _PAGE_BIT_PRESENT)
 #define _PAGE_RW	(_AT(pteval_t, 1) << _PAGE_BIT_RW)
 #define _PAGE_USER	(_AT(pteval_t, 1) << _PAGE_BIT_USER)
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index fd10d91a6115..7298156a76d5 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -195,6 +195,9 @@  static void __init probe_page_size_mask(void)
 		__supported_pte_mask |= _PAGE_GLOBAL;
 	}
 
+	if (pgtable_kvmxo_enabled())
+		__supported_pte_mask |= _PAGE_NR;
+
 	/* By the default is everything supported: */
 	__default_kernel_pte_mask = __supported_pte_mask;
 	/* Except when with PTI where the kernel is mostly non-Global: */