@@ -498,6 +498,11 @@ static inline bool avic_vcpu_is_running(struct kvm_vcpu *vcpu)
return (READ_ONCE(*entry) & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK);
}
+static bool svm_xsaves_supported(void)
+{
+ return boot_cpu_has(X86_FEATURE_XSAVES);
+}
+
static void recalc_intercepts(struct vcpu_svm *svm)
{
struct vmcb_control_area *c, *h;
@@ -5871,6 +5876,8 @@ static bool svm_has_emulated_msr(int index)
case MSR_IA32_MCG_EXT_CTL:
case MSR_IA32_VMX_BASIC ... MSR_IA32_VMX_VMFUNC:
return false;
+ case MSR_IA32_XSS:
+ return svm_xsaves_supported();
default:
break;
}
@@ -5964,11 +5971,6 @@ static bool svm_mpx_supported(void)
return false;
}
-static bool svm_xsaves_supported(void)
-{
- return boot_cpu_has(X86_FEATURE_XSAVES);
-}
-
static bool svm_umip_emulated(void)
{
return false;
@@ -6270,6 +6270,8 @@ static bool vmx_has_emulated_msr(int index)
case MSR_AMD64_VIRT_SPEC_CTRL:
/* This is AMD only. */
return false;
+ case MSR_IA32_XSS:
+ return vmx_xsaves_supported();
default:
return true;
}
@@ -1229,6 +1229,7 @@ static u32 emulated_msrs[] = {
MSR_MISC_FEATURES_ENABLES,
MSR_AMD64_VIRT_SPEC_CTRL,
MSR_IA32_POWER_CTL,
+ MSR_IA32_XSS,
/*
* The following list leaves out MSRs whose values are determined