[v2,51/94] KVM: arm64: nv: vgic-v3: Take cpu_if pointer directly instead of vcpu

Message ID	20200211174938.27809-52-maz@kernel.org (mailing list archive)
State	New, archived
Headers	show Return-Path: <SRS0=UyAS=37=vger.kernel.org=kvm-owner@kernel.org> From: Marc Zyngier <maz@kernel.org> To: linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org Cc: Andre Przywara <andre.przywara@arm.com>, Christoffer Dall <christoffer.dall@arm.com>, Dave Martin <Dave.Martin@arm.com>, Jintack Lim <jintack@cs.columbia.edu>, Alexandru Elisei <alexandru.elisei@arm.com>, James Morse <james.morse@arm.com>, Julien Thierry <julien.thierry.kdev@gmail.com>, Suzuki K Poulose <suzuki.poulose@arm.com> Subject: [PATCH v2 51/94] KVM: arm64: nv: vgic-v3: Take cpu_if pointer directly instead of vcpu Date: Tue, 11 Feb 2020 17:48:55 +0000 Message-Id: <20200211174938.27809-52-maz@kernel.org> In-Reply-To: <20200211174938.27809-1-maz@kernel.org> References: <20200211174938.27809-1-maz@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Sender: kvm-owner@vger.kernel.org Precedence: bulk
Series	KVM: arm64: ARMv8.3/8.4 Nested Virtualization support \| expand [v2,00/94] KVM: arm64: ARMv8.3/8.4 Nested Virtualization support [v2,01/94] KVM: arm64: Move __load_guest_stage2 to kvm_mmu.h [v2,02/94] arm64: Add ARM64_HAS_NESTED_VIRT cpufeature [v2,03/94] KVM: arm64: nv: Introduce nested virtualization VCPU feature [v2,04/94] KVM: arm64: nv: Reset VCPU to EL2 registers if VCPU nested virt is set [v2,05/94] KVM: arm64: nv: Allow userspace to set PSR_MODE_EL2x [v2,06/94] KVM: arm64: nv: Add EL2 system registers to vcpu context [v2,07/94] KVM: arm64: nv: Reset VMPIDR_EL2 and VPIDR_EL2 to sane values [v2,08/94] KVM: arm64: nv: Add nested virt VCPU primitives for vEL2 VCPU state [v2,09/94] KVM: arm64: nv: Support virtual EL2 exceptions [v2,10/94] KVM: arm64: nv: Inject HVC exceptions to the virtual EL2 [v2,11/94] KVM: arm64: nv: Handle trapped ERET from virtual EL2 [v2,12/94] KVM: arm64: nv: Add EL2->EL1 translation helpers [v2,13/94] KVM: arm64: nv: Refactor vcpu_{read,write}_sys_reg [v2,14/94] KVM: arm64: nv: Handle virtual EL2 registers in vcpu_read/write_sys_reg() [v2,15/94] KVM: arm64: nv: Handle SPSR_EL2 specially [v2,16/94] KVM: arm64: nv: Handle HCR_EL2.E2H specially [v2,17/94] KVM: arm64: nv: Save/Restore vEL2 sysregs [v2,18/94] KVM: arm64: nv: Emulate PSTATE.M for a guest hypervisor [v2,19/94] KVM: arm64: nv: Trap EL1 VM register accesses in virtual EL2 [v2,20/94] KVM: arm64: nv: Trap SPSR_EL1, ELR_EL1 and VBAR_EL1 from virtual EL2 [v2,21/94] KVM: arm64: nv: Trap CPACR_EL1 access in virtual EL2 [v2,22/94] KVM: arm64: nv: Handle PSCI call via smc from the guest [v2,23/94] KVM: arm64: nv: Respect virtual HCR_EL2.TWX setting [v2,24/94] KVM: arm64: nv: Respect virtual CPTR_EL2.{TFP,FPEN} settings [v2,25/94] KVM: arm64: nv: Respect the virtual HCR_EL2.NV bit setting [v2,26/94] KVM: arm64: nv: Respect virtual HCR_EL2.TVM and TRVM settings [v2,27/94] KVM: arm64: nv: Respect the virtual HCR_EL2.NV1 bit setting [v2,28/94] KVM: arm64: nv: Emulate EL12 register accesses from the virtual EL2 [v2,29/94] KVM: arm64: nv: Forward debug traps to the nested guest [v2,30/94] KVM: arm64: nv: Configure HCR_EL2 for nested virtualization [v2,31/94] KVM: arm64: nv: Only toggle cache for virtual EL2 when SCTLR_EL2 changes [v2,32/94] KVM: arm64: nv: Filter out unsupported features from ID regs [v2,33/94] KVM: arm64: nv: Hide RAS from nested guests [v2,34/94] KVM: arm64: nv: Use ARMv8.5-GTG to advertise supported Stage-2 page sizes [v2,35/94] KVM: arm64: Check advertised Stage-2 page size capability [v2,36/94] KVM: arm/arm64: nv: Factor out stage 2 page table data from struct kvm [v2,37/94] KVM: arm64: nv: Support multiple nested Stage-2 mmu structures [v2,38/94] KVM: arm64: nv: Implement nested Stage-2 page table walk logic [v2,39/94] KVM: arm64: nv: Handle shadow stage 2 page faults [v2,40/94] KVM: arm64: nv: Unmap/flush shadow stage 2 page tables [v2,41/94] KVM: arm64: nv: Move last_vcpu_ran to be per s2 mmu [v2,42/94] KVM: arm64: nv: Introduce sys_reg_desc.forward_trap [v2,43/94] KVM: arm64: nv: Set a handler for the system instruction traps [v2,44/94] KVM: arm64: nv: Trap and emulate AT instructions from virtual EL2 [v2,45/94] KVM: arm64: nv: Trap and emulate TLBI instructions from virtual EL2 [v2,46/94] KVM: arm64: nv: Fold guest's HCR_EL2 configuration into the host's [v2,47/94] KVM: arm64: nv: Handle traps for timer _EL02 and _EL2 sysregs accessors [v2,48/94] KVM: arm64: nv: arch_timer: Support hyp timer emulation [v2,49/94] KVM: arm64: nv: Propagate CNTVOFF_EL2 to the virtual EL1 timer [v2,50/94] KVM: arm64: nv: Load timer before the GIC [v2,51/94] KVM: arm64: nv: vgic-v3: Take cpu_if pointer directly instead of vcpu [v2,52/94] KVM: arm64: nv: Nested GICv3 Support [v2,53/94] KVM: arm64: nv: vgic: Emulate the HW bit in software [v2,54/94] KVM: arm64: nv: vgic: Allow userland to set VGIC maintenance IRQ [v2,55/94] KVM: arm64: nv: Implement maintenance interrupt forwarding [v2,56/94] KVM: arm64: nv: Add nested GICv3 tracepoints [v2,57/94] arm64: KVM: nv: Add handling of EL2-specific timer registers [v2,58/94] arm64: KVM: nv: Honor SCTLR_EL2.SPAN on entering vEL2 [v2,59/94] arm64: KVM: nv: Handle SCTLR_EL2 RES0/RES1 bits [v2,60/94] arm64: KVM: nv: Restrict S2 RD/WR permissions to match the guest's [v2,61/94] arm64: KVM: nv: Allow userspace to request KVM_ARM_VCPU_NESTED_VIRT [v2,62/94] arm64: Detect the ARMv8.4 TTL feature [v2,63/94] arm64: KVM: nv: Add handling of ARMv8.4-TTL TLB invalidation [v2,64/94] arm64: KVM: nv: Invalidate TLBs based on shadow S2 TTL-like information [v2,65/94] arm64: KVM: nv: Tag shadow S2 entries with nested level [v2,66/94] arm64: Add SW reserved PTE/PMD bits [v2,67/94] arm64: Add level-hinted TLB invalidation helper [v2,68/94] arm64: KVM: Add a level hint to __kvm_tlb_flush_vmid_ipa [v2,69/94] arm64: KVM: Use TTL hint in when invalidating stage-2 translations [v2,70/94] arm64: KVM: nv: Add include containing the VNCR_EL2 offsets [v2,71/94] KVM: arm64: Introduce accessor for ctxt->sys_reg [v2,72/94] KVM: arm64: sysreg: Use ctxt_sys_reg() instead of raw sys_regs access [v2,73/94] KVM: arm64: sve: Use __vcpu_sys_reg() instead of raw sys_regs access [v2,74/94] KVM: arm64: pauth: Use ctxt_sys_reg() instead of raw sys_regs access [v2,75/94] KVM: arm64: debug: Use ctxt_sys_reg() instead of raw sys_regs access [v2,76/94] KVM: arm64: Add missing reset handlers for PMU emulation [v2,77/94] KVM: arm64: nv: Move sysreg reset check to boot time [v2,78/94] KVM: arm64: Map VNCR-capable registers to a separate page [v2,79/94] KVM: arm64: nv: Move nested vgic state into the sysreg file [v2,80/94] KVM: arm64: Use accessors for timer ctl/cval/offset [v2,81/94] KVM: arm64: Add VNCR-capable timer accessors for arm64 [v2,82/94] KVM: arm64: Make struct kvm_regs userspace-only [v2,83/94] KVM: arm64: VNCR-ize ELR_EL1 [v2,84/94] KVM: arm64: VNCR-ize SP_EL1 [v2,85/94] KVM: arm64: Disintegrate SPSR array [v2,86/94] KVM: arm64: aarch32: Use __vcpu_sys_reg() instead of raw sys_regs access [v2,87/94] KVM: arm64: VNCR-ize SPSR_EL1 [v2,88/94] KVM: arm64: Add ARMv8.4 Enhanced Nested Virt cpufeature [v2,89/94] KVM: arm64: nv: Synchronize PSTATE early on exit [v2,90/94] KVM: arm64: nv: Sync nested timer state with ARMv8.4 [v2,91/94] KVM: arm64: nv: Allocate VNCR page when required [v2,92/94] KVM: arm64: nv: Enable ARMv8.4-NV support [v2,93/94] KVM: arm64: nv: Fast-track 'InHost' exception returns [v2,94/94] KVM: arm64: nv: Fast-track EL1 TLBIs for VHE guests

diff --git a/arch/arm/include/asm/kvm_hyp.h b/arch/arm/include/asm/kvm_hyp.h index 3c1b55ecc578..5d4017c4f649 100644 --- a/arch/arm/include/asm/kvm_hyp.h +++ b/arch/arm/include/asm/kvm_hyp.h @@ -103,12 +103,12 @@ void __vgic_v2_restore_state(struct kvm_vcpu *vcpu); void __sysreg_save_state(struct kvm_cpu_context *ctxt); void __sysreg_restore_state(struct kvm_cpu_context *ctxt); -void __vgic_v3_save_state(struct kvm_vcpu *vcpu); -void __vgic_v3_restore_state(struct kvm_vcpu *vcpu); -void __vgic_v3_activate_traps(struct kvm_vcpu *vcpu); -void __vgic_v3_deactivate_traps(struct kvm_vcpu *vcpu); -void __vgic_v3_save_aprs(struct kvm_vcpu *vcpu); -void __vgic_v3_restore_aprs(struct kvm_vcpu *vcpu); +void __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if); +void __vgic_v3_restore_state(struct vgic_v3_cpu_if *cpu_if); +void __vgic_v3_activate_traps(struct vgic_v3_cpu_if *cpu_if); +void __vgic_v3_deactivate_traps(struct vgic_v3_cpu_if *cpu_if); +void __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if); +void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if); asmlinkage void __vfp_save_state(struct vfp_hard_struct *vfp); asmlinkage void __vfp_restore_state(struct vfp_hard_struct *vfp); diff --git a/arch/arm/kvm/hyp/switch.c b/arch/arm/kvm/hyp/switch.c index 0b53e79f3bfb..272facc7f3ed 100644 --- a/arch/arm/kvm/hyp/switch.c +++ b/arch/arm/kvm/hyp/switch.c @@ -79,16 +79,16 @@ static void __hyp_text __deactivate_vm(struct kvm_vcpu *vcpu) static void __hyp_text __vgic_save_state(struct kvm_vcpu *vcpu) { if (static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif)) { - __vgic_v3_save_state(vcpu); - __vgic_v3_deactivate_traps(vcpu); + __vgic_v3_save_state(&vcpu->arch.vgic_cpu.vgic_v3); + __vgic_v3_deactivate_traps(&vcpu->arch.vgic_cpu.vgic_v3); } } static void __hyp_text __vgic_restore_state(struct kvm_vcpu *vcpu) { if (static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif)) { - __vgic_v3_activate_traps(vcpu); - __vgic_v3_restore_state(vcpu); + __vgic_v3_activate_traps(&vcpu->arch.vgic_cpu.vgic_v3); + __vgic_v3_restore_state(&vcpu->arch.vgic_cpu.vgic_v3); } } diff --git a/arch/arm64/include/asm/kvm_hyp.h b/arch/arm64/include/asm/kvm_hyp.h index 4899a5b74fc3..4c63a2254bf1 100644 --- a/arch/arm64/include/asm/kvm_hyp.h +++ b/arch/arm64/include/asm/kvm_hyp.h @@ -48,12 +48,12 @@ int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu); -void __vgic_v3_save_state(struct kvm_vcpu *vcpu); -void __vgic_v3_restore_state(struct kvm_vcpu *vcpu); -void __vgic_v3_activate_traps(struct kvm_vcpu *vcpu); -void __vgic_v3_deactivate_traps(struct kvm_vcpu *vcpu); -void __vgic_v3_save_aprs(struct kvm_vcpu *vcpu); -void __vgic_v3_restore_aprs(struct kvm_vcpu *vcpu); +void __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if); +void __vgic_v3_restore_state(struct vgic_v3_cpu_if *cpu_if); +void __vgic_v3_activate_traps(struct vgic_v3_cpu_if *cpu_if); +void __vgic_v3_deactivate_traps(struct vgic_v3_cpu_if *cpu_if); +void __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if); +void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if); int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu); void __timer_enable_traps(struct kvm_vcpu *vcpu); diff --git a/arch/arm64/kvm/hyp/switch.c b/arch/arm64/kvm/hyp/switch.c index 43e3a60915b1..97c5c1a791b8 100644 --- a/arch/arm64/kvm/hyp/switch.c +++ b/arch/arm64/kvm/hyp/switch.c @@ -306,8 +306,8 @@ static void __hyp_text __deactivate_vm(struct kvm_vcpu *vcpu) static void __hyp_text __hyp_vgic_save_state(struct kvm_vcpu *vcpu) { if (static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif)) { - __vgic_v3_save_state(vcpu); - __vgic_v3_deactivate_traps(vcpu); + __vgic_v3_save_state(&vcpu->arch.vgic_cpu.vgic_v3); + __vgic_v3_deactivate_traps(&vcpu->arch.vgic_cpu.vgic_v3); } } @@ -315,8 +315,8 @@ static void __hyp_text __hyp_vgic_save_state(struct kvm_vcpu *vcpu) static void __hyp_text __hyp_vgic_restore_state(struct kvm_vcpu *vcpu) { if (static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif)) { - __vgic_v3_activate_traps(vcpu); - __vgic_v3_restore_state(vcpu); + __vgic_v3_activate_traps(&vcpu->arch.vgic_cpu.vgic_v3); + __vgic_v3_restore_state(&vcpu->arch.vgic_cpu.vgic_v3); } } diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h index 1b477c662608..f89b81327bb0 100644 --- a/include/kvm/arm_vgic.h +++ b/include/kvm/arm_vgic.h @@ -270,6 +270,8 @@ struct vgic_v2_cpu_if { u32 vgic_vmcr; u32 vgic_apr; u32 vgic_lr[VGIC_V2_MAX_LRS]; + + unsigned int used_lrs; }; struct vgic_v3_cpu_if { @@ -287,6 +289,8 @@ struct vgic_v3_cpu_if { * linking the Linux IRQ subsystem and the ITS together. */ struct its_vpe its_vpe; + + unsigned int used_lrs; }; struct vgic_cpu { @@ -296,7 +300,6 @@ struct vgic_cpu { struct vgic_v3_cpu_if vgic_v3; }; - unsigned int used_lrs; struct vgic_irq private_irqs[VGIC_NR_PRIVATE_IRQS]; raw_spinlock_t ap_list_lock; /* Protects the ap_list */ diff --git a/virt/kvm/arm/hyp/vgic-v3-sr.c b/virt/kvm/arm/hyp/vgic-v3-sr.c index ccf1fde9836c..2ea9a0b73fc4 100644 --- a/virt/kvm/arm/hyp/vgic-v3-sr.c +++ b/virt/kvm/arm/hyp/vgic-v3-sr.c @@ -194,10 +194,9 @@ static u32 __hyp_text __vgic_v3_read_ap1rn(int n) return val; } -void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu) +void __hyp_text __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if) { - struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3; - u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs; + u64 used_lrs = cpu_if->used_lrs; /* * Make sure stores to the GIC via the memory mapped interface @@ -230,10 +229,9 @@ void __hyp_text __vgic_v3_save_state(struct kvm_vcpu *vcpu) } } -void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu) +void __hyp_text __vgic_v3_restore_state(struct vgic_v3_cpu_if *cpu_if) { - struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3; - u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs; + u64 used_lrs = cpu_if->used_lrs; int i; if (used_lrs || cpu_if->its_vpe.its_vm) { @@ -257,10 +255,8 @@ void __hyp_text __vgic_v3_restore_state(struct kvm_vcpu *vcpu) } } -void __hyp_text __vgic_v3_activate_traps(struct kvm_vcpu *vcpu) +void __hyp_text __vgic_v3_activate_traps(struct vgic_v3_cpu_if *cpu_if) { - struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3; - /* * VFIQEn is RES1 if ICC_SRE_EL1.SRE is 1. This causes a * Group0 interrupt (as generated in GICv2 mode) to be @@ -306,9 +302,8 @@ void __hyp_text __vgic_v3_activate_traps(struct kvm_vcpu *vcpu) write_gicreg(cpu_if->vgic_hcr, ICH_HCR_EL2); } -void __hyp_text __vgic_v3_deactivate_traps(struct kvm_vcpu *vcpu) +void __hyp_text __vgic_v3_deactivate_traps(struct vgic_v3_cpu_if *cpu_if) { - struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3; u64 val; if (!cpu_if->vgic_sre) { @@ -333,15 +328,11 @@ void __hyp_text __vgic_v3_deactivate_traps(struct kvm_vcpu *vcpu) write_gicreg(0, ICH_HCR_EL2); } -void __hyp_text __vgic_v3_save_aprs(struct kvm_vcpu *vcpu) +void __hyp_text __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if) { - struct vgic_v3_cpu_if *cpu_if; u64 val; u32 nr_pre_bits; - vcpu = kern_hyp_va(vcpu); - cpu_if = &vcpu->arch.vgic_cpu.vgic_v3; - val = read_gicreg(ICH_VTR_EL2); nr_pre_bits = vtr_to_nr_pre_bits(val); @@ -370,15 +361,11 @@ void __hyp_text __vgic_v3_save_aprs(struct kvm_vcpu *vcpu) } } -void __hyp_text __vgic_v3_restore_aprs(struct kvm_vcpu *vcpu) +void __hyp_text __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if) { - struct vgic_v3_cpu_if *cpu_if; u64 val; u32 nr_pre_bits; - vcpu = kern_hyp_va(vcpu); - cpu_if = &vcpu->arch.vgic_cpu.vgic_v3; - val = read_gicreg(ICH_VTR_EL2); nr_pre_bits = vtr_to_nr_pre_bits(val); @@ -453,7 +440,7 @@ static int __hyp_text __vgic_v3_highest_priority_lr(struct kvm_vcpu *vcpu, u32 vmcr, u64 *lr_val) { - unsigned int used_lrs = vcpu->arch.vgic_cpu.used_lrs; + unsigned int used_lrs = vcpu->arch.vgic_cpu.vgic_v3.used_lrs; u8 priority = GICv3_IDLE_PRIORITY; int i, lr = -1; @@ -492,7 +479,7 @@ static int __hyp_text __vgic_v3_highest_priority_lr(struct kvm_vcpu *vcpu, static int __hyp_text __vgic_v3_find_active_lr(struct kvm_vcpu *vcpu, int intid, u64 *lr_val) { - unsigned int used_lrs = vcpu->arch.vgic_cpu.used_lrs; + unsigned int used_lrs = vcpu->arch.vgic_cpu.vgic_v3.used_lrs; int i; for (i = 0; i < used_lrs; i++) { diff --git a/virt/kvm/arm/vgic/vgic-v2.c b/virt/kvm/arm/vgic/vgic-v2.c index 621cc168fe3f..ebf53a4e1296 100644 --- a/virt/kvm/arm/vgic/vgic-v2.c +++ b/virt/kvm/arm/vgic/vgic-v2.c @@ -56,7 +56,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu) cpuif->vgic_hcr &= ~GICH_HCR_UIE; - for (lr = 0; lr < vgic_cpu->used_lrs; lr++) { + for (lr = 0; lr < vgic_cpu->vgic_v2.used_lrs; lr++) { u32 val = cpuif->vgic_lr[lr]; u32 cpuid, intid = val & GICH_LR_VIRTUALID; struct vgic_irq *irq; @@ -120,7 +120,7 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu) vgic_put_irq(vcpu->kvm, irq); } - vgic_cpu->used_lrs = 0; + cpuif->used_lrs = 0; } /* @@ -427,7 +427,7 @@ int vgic_v2_probe(const struct gic_kvm_info *info) static void save_lrs(struct kvm_vcpu *vcpu, void __iomem *base) { struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; - u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs; + u64 used_lrs = cpu_if->used_lrs; u64 elrsr; int i; @@ -448,7 +448,7 @@ static void save_lrs(struct kvm_vcpu *vcpu, void __iomem *base) void vgic_v2_save_state(struct kvm_vcpu *vcpu) { void __iomem *base = kvm_vgic_global_state.vctrl_base; - u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs; + u64 used_lrs = vcpu->arch.vgic_cpu.vgic_v2.used_lrs; if (!base) return; @@ -463,7 +463,7 @@ void vgic_v2_restore_state(struct kvm_vcpu *vcpu) { struct vgic_v2_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v2; void __iomem *base = kvm_vgic_global_state.vctrl_base; - u64 used_lrs = vcpu->arch.vgic_cpu.used_lrs; + u64 used_lrs = cpu_if->used_lrs; int i; if (!base) diff --git a/virt/kvm/arm/vgic/vgic-v3.c b/virt/kvm/arm/vgic/vgic-v3.c index f45635a6f0ec..a8732afb37e5 100644 --- a/virt/kvm/arm/vgic/vgic-v3.c +++ b/virt/kvm/arm/vgic/vgic-v3.c @@ -39,7 +39,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu) cpuif->vgic_hcr &= ~ICH_HCR_UIE; - for (lr = 0; lr < vgic_cpu->used_lrs; lr++) { + for (lr = 0; lr < cpuif->used_lrs; lr++) { u64 val = cpuif->vgic_lr[lr]; u32 intid, cpuid; struct vgic_irq *irq; @@ -111,7 +111,7 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu) vgic_put_irq(vcpu->kvm, irq); } - vgic_cpu->used_lrs = 0; + cpuif->used_lrs = 0; } /* Requires the irq to be locked already */ @@ -660,10 +660,10 @@ void vgic_v3_load(struct kvm_vcpu *vcpu) if (likely(cpu_if->vgic_sre)) kvm_call_hyp(__vgic_v3_write_vmcr, cpu_if->vgic_vmcr); - kvm_call_hyp(__vgic_v3_restore_aprs, vcpu); + kvm_call_hyp(__vgic_v3_restore_aprs, kern_hyp_va(cpu_if)); if (has_vhe()) - __vgic_v3_activate_traps(vcpu); + __vgic_v3_activate_traps(cpu_if); WARN_ON(vgic_v4_load(vcpu)); } @@ -678,12 +678,14 @@ void vgic_v3_vmcr_sync(struct kvm_vcpu *vcpu) void vgic_v3_put(struct kvm_vcpu *vcpu) { + struct vgic_v3_cpu_if *cpu_if = &vcpu->arch.vgic_cpu.vgic_v3; + WARN_ON(vgic_v4_put(vcpu, false)); vgic_v3_vmcr_sync(vcpu); - kvm_call_hyp(__vgic_v3_save_aprs, vcpu); + kvm_call_hyp(__vgic_v3_save_aprs, kern_hyp_va(cpu_if)); if (has_vhe()) - __vgic_v3_deactivate_traps(vcpu); + __vgic_v3_deactivate_traps(cpu_if); } diff --git a/virt/kvm/arm/vgic/vgic.c b/virt/kvm/arm/vgic/vgic.c index 4cbaf0020277..a2428b42f7e2 100644 --- a/virt/kvm/arm/vgic/vgic.c +++ b/virt/kvm/arm/vgic/vgic.c @@ -801,6 +801,7 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu) int count; bool multi_sgi; u8 prio = 0xff; + int i = 0; lockdep_assert_held(&vgic_cpu->ap_list_lock); @@ -842,11 +843,14 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu) } } - vcpu->arch.vgic_cpu.used_lrs = count; - /* Nuke remaining LRs */ - for ( ; count < kvm_vgic_global_state.nr_lr; count++) - vgic_clear_lr(vcpu, count); + for (i = count ; i < kvm_vgic_global_state.nr_lr; i++) + vgic_clear_lr(vcpu, i); + + if (!static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif)) + vcpu->arch.vgic_cpu.vgic_v2.used_lrs = count; + else + vcpu->arch.vgic_cpu.vgic_v3.used_lrs = count; } static inline bool can_access_vgic_from_kernel(void) @@ -864,13 +868,13 @@ static inline void vgic_save_state(struct kvm_vcpu *vcpu) if (!static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif)) vgic_v2_save_state(vcpu); else - __vgic_v3_save_state(vcpu); + __vgic_v3_save_state(&vcpu->arch.vgic_cpu.vgic_v3); } /* Sync back the hardware VGIC state into our emulation after a guest's run. */ void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu) { - struct vgic_cpu *vgic_cpu = &vcpu->arch.vgic_cpu; + int used_lrs; /* An empty ap_list_head implies used_lrs == 0 */ if (list_empty(&vcpu->arch.vgic_cpu.ap_list_head)) @@ -879,7 +883,12 @@ void kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu) if (can_access_vgic_from_kernel()) vgic_save_state(vcpu); - if (vgic_cpu->used_lrs) + if (!static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif)) + used_lrs = vcpu->arch.vgic_cpu.vgic_v2.used_lrs; + else + used_lrs = vcpu->arch.vgic_cpu.vgic_v3.used_lrs; + + if (used_lrs) vgic_fold_lr_state(vcpu); vgic_prune_ap_list(vcpu); } @@ -889,7 +898,7 @@ static inline void vgic_restore_state(struct kvm_vcpu *vcpu) if (!static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif)) vgic_v2_restore_state(vcpu); else - __vgic_v3_restore_state(vcpu); + __vgic_v3_restore_state(&vcpu->arch.vgic_cpu.vgic_v3); } /* Flush our emulation state into the GIC hardware before entering the guest. */

[v2,51/94] KVM: arm64: nv: vgic-v3: Take cpu_if pointer directly instead of vcpu

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Patch