@@ -153,5 +153,7 @@
#define MT_DEVICE_GRE 2
#define MT_NORMAL_NC 3 /* writecombine */
#define MT_NORMAL 4
+#define MT_NORMAL_WT 5
+#define MT_DEVICE_nGRE 6
#endif /* _ASMARM64_PGTABLE_HWDEF_H_ */
@@ -154,6 +154,8 @@ halt:
* DEVICE_GRE 010 00001100
* NORMAL_NC 011 01000100
* NORMAL 100 11111111
+ * NORMAL_WT 101 10111011
+ * DEVICE_nGRE 110 00001000
*/
#define MAIR(attr, mt) ((attr) << ((mt) * 8))
@@ -184,7 +186,9 @@ asm_mmu_enable:
MAIR(0x04, MT_DEVICE_nGnRE) | \
MAIR(0x0c, MT_DEVICE_GRE) | \
MAIR(0x44, MT_NORMAL_NC) | \
- MAIR(0xff, MT_NORMAL)
+ MAIR(0xff, MT_NORMAL) | \
+ MAIR(0xbb, MT_NORMAL_WT) | \
+ MAIR(0x08, MT_DEVICE_nGRE)
msr mair_el1, x1
/* TTBR0 */