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[88.21.206.101]) by smtp.gmail.com with ESMTPSA id n17sm3479198wmc.33.2020.12.06.15.39.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Dec 2020 15:39:56 -0800 (PST) Sender: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Aurelien Jarno , Jiaxun Yang , Paul Burton , kvm@vger.kernel.org, Huacai Chen , =?utf-8?q?Philipp?= =?utf-8?q?e_Mathieu-Daud=C3=A9?= , Richard Henderson , Aleksandar Rikalo , Paolo Bonzini Subject: [PATCH 01/19] hw/mips: Move address translation helpers to target/mips/ Date: Mon, 7 Dec 2020 00:39:31 +0100 Message-Id: <20201206233949.3783184-2-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201206233949.3783184-1-f4bug@amsat.org> References: <20201206233949.3783184-1-f4bug@amsat.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Address translation is an architectural thing (not hardware related). Move the helpers from hw/ to target/. As physical address and KVM are specific to system mode emulation, restrict this file to softmmu, so it doesn't get compiled for user-mode emulation. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- include/hw/mips/cpudevs.h | 7 ------- target/mips/cpu.h | 8 ++++++++ hw/mips/boston.c | 1 - {hw => target}/mips/addr.c | 2 +- target/mips/translate.c | 2 -- hw/mips/meson.build | 2 +- target/mips/meson.build | 1 + 7 files changed, 11 insertions(+), 12 deletions(-) rename {hw => target}/mips/addr.c (98%) diff --git a/include/hw/mips/cpudevs.h b/include/hw/mips/cpudevs.h index 291f59281a0..f7c9728fa9f 100644 --- a/include/hw/mips/cpudevs.h +++ b/include/hw/mips/cpudevs.h @@ -5,13 +5,6 @@ /* Definitions for MIPS CPU internal devices. */ -/* addr.c */ -uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr); -uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr); -uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr); -bool mips_um_ksegs_enabled(void); -void mips_um_ksegs_enable(void); - /* mips_int.c */ void cpu_mips_irq_init_cpu(MIPSCPU *cpu); diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 23f8c6f96cd..313e3252cbb 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1290,6 +1290,14 @@ bool cpu_supports_cps_smp(const char *cpu_type); bool cpu_supports_isa(const char *cpu_type, uint64_t isa); void cpu_set_exception_base(int vp_index, target_ulong address); +/* addr.c */ +uint64_t cpu_mips_kseg0_to_phys(void *opaque, uint64_t addr); +uint64_t cpu_mips_phys_to_kseg0(void *opaque, uint64_t addr); + +uint64_t cpu_mips_kvm_um_phys_to_kseg0(void *opaque, uint64_t addr); +bool mips_um_ksegs_enabled(void); +void mips_um_ksegs_enable(void); + /* mips_int.c */ void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level); diff --git a/hw/mips/boston.c b/hw/mips/boston.c index 3d40867dc4c..91183363ff3 100644 --- a/hw/mips/boston.c +++ b/hw/mips/boston.c @@ -28,7 +28,6 @@ #include "hw/loader.h" #include "hw/loader-fit.h" #include "hw/mips/cps.h" -#include "hw/mips/cpudevs.h" #include "hw/pci-host/xilinx-pcie.h" #include "hw/qdev-clock.h" #include "hw/qdev-properties.h" diff --git a/hw/mips/addr.c b/target/mips/addr.c similarity index 98% rename from hw/mips/addr.c rename to target/mips/addr.c index 2f138fe1ea8..27a6036c451 100644 --- a/hw/mips/addr.c +++ b/target/mips/addr.c @@ -21,7 +21,7 @@ */ #include "qemu/osdep.h" -#include "hw/mips/cpudevs.h" +#include "cpu.h" static int mips_um_ksegs; diff --git a/target/mips/translate.c b/target/mips/translate.c index c64a1bc42e1..87dc38c0683 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -28,8 +28,6 @@ #include "exec/exec-all.h" #include "tcg/tcg-op.h" #include "exec/cpu_ldst.h" -#include "hw/mips/cpudevs.h" - #include "exec/helper-proto.h" #include "exec/helper-gen.h" #include "hw/semihosting/semihost.h" diff --git a/hw/mips/meson.build b/hw/mips/meson.build index bcdf96be69f..77b4d8f365e 100644 --- a/hw/mips/meson.build +++ b/hw/mips/meson.build @@ -1,5 +1,5 @@ mips_ss = ss.source_set() -mips_ss.add(files('addr.c', 'mips_int.c')) +mips_ss.add(files('mips_int.c')) mips_ss.add(when: 'CONFIG_FULOONG', if_true: files('fuloong2e.c')) mips_ss.add(when: 'CONFIG_JAZZ', if_true: files('jazz.c')) mips_ss.add(when: 'CONFIG_MALTA', if_true: files('gt64xxx_pci.c', 'malta.c')) diff --git a/target/mips/meson.build b/target/mips/meson.build index fa1f024e782..d980240f9e3 100644 --- a/target/mips/meson.build +++ b/target/mips/meson.build @@ -15,6 +15,7 @@ mips_softmmu_ss = ss.source_set() mips_softmmu_ss.add(files( + 'addr.c', 'cp0_timer.c', 'machine.c', 'mips-semi.c',