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[88.21.206.101]) by smtp.gmail.com with ESMTPSA id k2sm14013964ejp.6.2020.12.07.15.55.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Dec 2020 15:55:56 -0800 (PST) Sender: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Jiaxun Yang , Paolo Bonzini , Aurelien Jarno , Aleksandar Rikalo , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , Laurent Vivier , Richard Henderson , Huacai Chen , kvm@vger.kernel.org Subject: [PATCH 3/7] target/mips: Use FloatRoundMode enum for FCR31 modes conversion Date: Tue, 8 Dec 2020 00:55:35 +0100 Message-Id: <20201207235539.4070364-4-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201207235539.4070364-1-f4bug@amsat.org> References: <20201207235539.4070364-1-f4bug@amsat.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Use the FloatRoundMode enum type introduced in commit 3dede407cc6 ("softfloat: Name rounding mode enum") instead of 'unsigned int'. Suggested-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20201123204448.3260804-2-f4bug@amsat.org> --- target/mips/internal.h | 3 ++- target/mips/fpu_helper.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/target/mips/internal.h b/target/mips/internal.h index d290c1afe30..5d8a8a1838e 100644 --- a/target/mips/internal.h +++ b/target/mips/internal.h @@ -226,7 +226,8 @@ bool mips_cpu_tlb_fill(CPUState *cs, vaddr address, int size, uint32_t float_class_s(uint32_t arg, float_status *fst); uint64_t float_class_d(uint64_t arg, float_status *fst); -extern unsigned int ieee_rm[]; +extern const FloatRoundMode ieee_rm[4]; + void update_pagemask(CPUMIPSState *env, target_ulong arg1, int32_t *pagemask); static inline void restore_rounding_mode(CPUMIPSState *env) diff --git a/target/mips/fpu_helper.c b/target/mips/fpu_helper.c index 020b768e87b..501bd401a16 100644 --- a/target/mips/fpu_helper.c +++ b/target/mips/fpu_helper.c @@ -42,7 +42,7 @@ #define FP_TO_INT64_OVERFLOW 0x7fffffffffffffffULL /* convert MIPS rounding mode in FCR31 to IEEE library */ -unsigned int ieee_rm[] = { +const FloatRoundMode ieee_rm[4] = { float_round_nearest_even, float_round_to_zero, float_round_up,