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[88.10.103.241]) by smtp.gmail.com with ESMTPSA id b83sm9675771wmd.48.2021.01.07.14.27.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Jan 2021 14:27:54 -0800 (PST) Sender: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: libvir-list@redhat.com, Paolo Bonzini , Laurent Vivier , kvm@vger.kernel.org, Jiaxun Yang , Aurelien Jarno , Huacai Chen , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Paul Burton , Richard Henderson Subject: [PULL 58/66] target/mips: Convert Rel6 Special2 opcode to decodetree Date: Thu, 7 Jan 2021 23:22:45 +0100 Message-Id: <20210107222253.20382-59-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210107222253.20382-1-f4bug@amsat.org> References: <20210107222253.20382-1-f4bug@amsat.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Special2 opcode have been removed from the Release 6. Add a single decodetree entry for all the opcode class, triggering Reserved Instruction if ever used. Remove unreachable check_insn_opc_removed() call. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20201208203704.243704-7-f4bug@amsat.org> --- target/mips/mips32r6.decode | 2 ++ target/mips/rel6_translate.c | 7 +++++++ target/mips/translate.c | 2 -- 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/target/mips/mips32r6.decode b/target/mips/mips32r6.decode index 027585ee042..259bac612ab 100644 --- a/target/mips/mips32r6.decode +++ b/target/mips/mips32r6.decode @@ -15,3 +15,5 @@ @lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &lsa LSA 000000 ..... ..... ..... 000 .. 000101 @lsa + +REMOVED 011100 ----- ----- ----- ----- ------ # SPECIAL2 diff --git a/target/mips/rel6_translate.c b/target/mips/rel6_translate.c index 631d0b87748..51264f0ce92 100644 --- a/target/mips/rel6_translate.c +++ b/target/mips/rel6_translate.c @@ -18,6 +18,13 @@ #include "decode-mips32r6.c.inc" #include "decode-mips64r6.c.inc" +bool trans_REMOVED(DisasContext *ctx, arg_REMOVED *a) +{ + gen_reserved_instruction(ctx); + + return true; +} + static bool trans_LSA(DisasContext *ctx, arg_LSA *a) { return gen_LSA(ctx, a->rd, a->rt, a->rs, a->sa); diff --git a/target/mips/translate.c b/target/mips/translate.c index f4481afb8de..01c1ee546e2 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -27137,8 +27137,6 @@ static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ctx) int rs, rt, rd; uint32_t op1; - check_insn_opc_removed(ctx, ISA_MIPS_R6); - rs = (ctx->opcode >> 21) & 0x1f; rt = (ctx->opcode >> 16) & 0x1f; rd = (ctx->opcode >> 11) & 0x1f;