Message ID | 20210205012458.3872687-3-seanjc@google.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | KVM: x86: RSM emulation DR6/DR7 cleanups | expand |
On 05/02/21 02:24, Sean Christopherson wrote: > Restore the full 64-bit values of DR6 and DR7 when emulating RSM on > x86-64, as defined by both Intel's SDM and AMD's APM. > > Note, bits 63:32 of DR6 and DR7 are reserved, so this is a glorified nop > unless the SMM handler is poking into SMRAM, which it most definitely > shouldn't be doing since both Intel and AMD list the DR6 and DR7 fields > as read-only. > > Fixes: 660a5d517aaa ("KVM: x86: save/load state on SMM switch") > Signed-off-by: Sean Christopherson <seanjc@google.com> > --- > arch/x86/kvm/emulate.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c > index 2e6e6c39922f..72a1bd04dfe1 100644 > --- a/arch/x86/kvm/emulate.c > +++ b/arch/x86/kvm/emulate.c > @@ -2564,12 +2564,12 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt, > ctxt->_eip = GET_SMSTATE(u64, smstate, 0x7f78); > ctxt->eflags = GET_SMSTATE(u32, smstate, 0x7f70) | X86_EFLAGS_FIXED; > > - val = GET_SMSTATE(u32, smstate, 0x7f68); > + val = GET_SMSTATE(u64, smstate, 0x7f68); > > if (ctxt->ops->set_dr(ctxt, 6, val)) > return X86EMUL_UNHANDLEABLE; > > - val = GET_SMSTATE(u32, smstate, 0x7f60); > + val = GET_SMSTATE(u64, smstate, 0x7f60); > > if (ctxt->ops->set_dr(ctxt, 7, val)) > return X86EMUL_UNHANDLEABLE; > Queued, thanks. Paolo
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c index 2e6e6c39922f..72a1bd04dfe1 100644 --- a/arch/x86/kvm/emulate.c +++ b/arch/x86/kvm/emulate.c @@ -2564,12 +2564,12 @@ static int rsm_load_state_64(struct x86_emulate_ctxt *ctxt, ctxt->_eip = GET_SMSTATE(u64, smstate, 0x7f78); ctxt->eflags = GET_SMSTATE(u32, smstate, 0x7f70) | X86_EFLAGS_FIXED; - val = GET_SMSTATE(u32, smstate, 0x7f68); + val = GET_SMSTATE(u64, smstate, 0x7f68); if (ctxt->ops->set_dr(ctxt, 6, val)) return X86EMUL_UNHANDLEABLE; - val = GET_SMSTATE(u32, smstate, 0x7f60); + val = GET_SMSTATE(u64, smstate, 0x7f60); if (ctxt->ops->set_dr(ctxt, 7, val)) return X86EMUL_UNHANDLEABLE;
Restore the full 64-bit values of DR6 and DR7 when emulating RSM on x86-64, as defined by both Intel's SDM and AMD's APM. Note, bits 63:32 of DR6 and DR7 are reserved, so this is a glorified nop unless the SMM handler is poking into SMRAM, which it most definitely shouldn't be doing since both Intel and AMD list the DR6 and DR7 fields as read-only. Fixes: 660a5d517aaa ("KVM: x86: save/load state on SMM switch") Signed-off-by: Sean Christopherson <seanjc@google.com> --- arch/x86/kvm/emulate.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)