| Message ID | 20210415115032.35760-5-wangyanan55@huawei.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: arm64: Improve efficiency of stage2 page table | expand |
Hi Marc, On 2021/6/2 18:22, Marc Zyngier wrote: > On Thu, 15 Apr 2021 12:50:30 +0100, > Yanan Wang <wangyanan55@huawei.com> wrote: >> We want to move I-cache maintenance for the guest to the stage-2 >> page table code for performance improvement. Before it can work, >> we should first make function invalidate_icache_range available >> to non-VHE EL2 to avoid compiling or program running error, as >> pgtable.c is now linked into the non-VHE EL2 code for pKVM mode. >> >> In this patch, we only introduce symbol of invalidate_icache_range >> with no real functionality in nvhe/cache.S, because there haven't >> been situations found currently where I-cache maintenance is also >> needed in non-VHE EL2 for pKVM mode. >> >> Signed-off-by: Yanan Wang <wangyanan55@huawei.com> >> --- >> arch/arm64/kvm/hyp/nvhe/cache.S | 11 +++++++++++ >> 1 file changed, 11 insertions(+) >> >> diff --git a/arch/arm64/kvm/hyp/nvhe/cache.S b/arch/arm64/kvm/hyp/nvhe/cache.S >> index 36cef6915428..a125ec9aeed2 100644 >> --- a/arch/arm64/kvm/hyp/nvhe/cache.S >> +++ b/arch/arm64/kvm/hyp/nvhe/cache.S >> @@ -11,3 +11,14 @@ SYM_FUNC_START_PI(__flush_dcache_area) >> dcache_by_line_op civac, sy, x0, x1, x2, x3 >> ret >> SYM_FUNC_END_PI(__flush_dcache_area) >> + >> +/* >> + * invalidate_icache_range(start,end) >> + * >> + * Ensure that the I cache is invalid within specified region. >> + * >> + * - start - virtual start address of region >> + * - end - virtual end address of region >> + */ >> +SYM_FUNC_START(invalidate_icache_range) >> +SYM_FUNC_END(invalidate_icache_range) > This is a good indication that something is really wrong. > > If you were to provide cache management callbacks as part of the > mm_ops themselves (or a similar abstraction), you wouldn't have to do > these things. Yes, we definitely don't need this work if we do that. Thanks, Yanan > > M. >
diff --git a/arch/arm64/kvm/hyp/nvhe/cache.S b/arch/arm64/kvm/hyp/nvhe/cache.S index 36cef6915428..a125ec9aeed2 100644 --- a/arch/arm64/kvm/hyp/nvhe/cache.S +++ b/arch/arm64/kvm/hyp/nvhe/cache.S @@ -11,3 +11,14 @@ SYM_FUNC_START_PI(__flush_dcache_area) dcache_by_line_op civac, sy, x0, x1, x2, x3 ret SYM_FUNC_END_PI(__flush_dcache_area) + +/* + * invalidate_icache_range(start,end) + * + * Ensure that the I cache is invalid within specified region. + * + * - start - virtual start address of region + * - end - virtual end address of region + */ +SYM_FUNC_START(invalidate_icache_range) +SYM_FUNC_END(invalidate_icache_range)
We want to move I-cache maintenance for the guest to the stage-2 page table code for performance improvement. Before it can work, we should first make function invalidate_icache_range available to non-VHE EL2 to avoid compiling or program running error, as pgtable.c is now linked into the non-VHE EL2 code for pKVM mode. In this patch, we only introduce symbol of invalidate_icache_range with no real functionality in nvhe/cache.S, because there haven't been situations found currently where I-cache maintenance is also needed in non-VHE EL2 for pKVM mode. Signed-off-by: Yanan Wang <wangyanan55@huawei.com> --- arch/arm64/kvm/hyp/nvhe/cache.S | 11 +++++++++++ 1 file changed, 11 insertions(+)