Message ID | 20211027095658.144468-3-yishaih@nvidia.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Wed, 27 Oct 2021 09:57:59 +0000 Received: from HQMAIL111.nvidia.com (172.20.187.18) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1497.18; Wed, 27 Oct 2021 09:57:57 +0000 Received: from vdi.nvidia.com (172.20.187.5) by mail.nvidia.com (172.20.187.18) with Microsoft SMTP Server id 15.0.1497.18 via Frontend Transport; Wed, 27 Oct 2021 09:57:54 +0000 From: Yishai Hadas <yishaih@nvidia.com> To: <alex.williamson@redhat.com>, <bhelgaas@google.com>, <jgg@nvidia.com>, <saeedm@nvidia.com> CC: <linux-pci@vger.kernel.org>, <kvm@vger.kernel.org>, <netdev@vger.kernel.org>, <kuba@kernel.org>, <leonro@nvidia.com>, <kwankhede@nvidia.com>, <mgurtovoy@nvidia.com>, <yishaih@nvidia.com>, <maorg@nvidia.com> Subject: [PATCH V5 mlx5-next 02/13] net/mlx5: Reuse exported virtfn index function call Date: Wed, 27 Oct 2021 12:56:47 +0300 Message-ID: <20211027095658.144468-3-yishaih@nvidia.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20211027095658.144468-1-yishaih@nvidia.com> References: <20211027095658.144468-1-yishaih@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: ef8d0f48-8ed3-4e25-1af6-08d9993041fa X-MS-TrafficTypeDiagnostic: MW3PR12MB4571: X-Microsoft-Antispam-PRVS: <MW3PR12MB4571A3AEBBD0E1212C75E475C3859@MW3PR12MB4571.namprd12.prod.outlook.com> X-MS-Oob-TLC-OOBClassifiers: OLM:3826; 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Series |
Add mlx5 live migration driver
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expand
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diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sriov.c b/drivers/net/ethernet/mellanox/mlx5/core/sriov.c index e8185b69ac6c..24c4b4f05214 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/sriov.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/sriov.c @@ -205,19 +205,8 @@ int mlx5_core_sriov_set_msix_vec_count(struct pci_dev *vf, int msix_vec_count) mlx5_get_default_msix_vec_count(dev, pci_num_vf(pf)); sriov = &dev->priv.sriov; - - /* Reversed translation of PCI VF function number to the internal - * function_id, which exists in the name of virtfn symlink. - */ - for (id = 0; id < pci_num_vf(pf); id++) { - if (!sriov->vfs_ctx[id].enabled) - continue; - - if (vf->devfn == pci_iov_virtfn_devfn(pf, id)) - break; - } - - if (id == pci_num_vf(pf) || !sriov->vfs_ctx[id].enabled) + id = pci_iov_vf_id(vf); + if (id < 0 || !sriov->vfs_ctx[id].enabled) return -EINVAL; return mlx5_set_msix_vec_count(dev, id + 1, msix_vec_count);