From patchwork Wed Nov 17 06:43:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 12623861 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E8D7C433FE for ; Wed, 17 Nov 2021 06:53:50 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E955A61875 for ; Wed, 17 Nov 2021 06:53:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234003AbhKQG4q (ORCPT ); Wed, 17 Nov 2021 01:56:46 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36946 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233988AbhKQG4p (ORCPT ); Wed, 17 Nov 2021 01:56:45 -0500 Received: from mail-pj1-x1049.google.com (mail-pj1-x1049.google.com [IPv6:2607:f8b0:4864:20::1049]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 566A0C061570 for ; Tue, 16 Nov 2021 22:53:47 -0800 (PST) Received: by mail-pj1-x1049.google.com with SMTP id jx2-20020a17090b46c200b001a62e9db321so848257pjb.7 for ; Tue, 16 Nov 2021 22:53:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=QbNVmbb/Oy+N5CWYEueDFqMF+6Qv00nkT2lV81yBcus=; b=rnThbfam0MmqlS4xxWCfnkTZjTwIIjz7OGsfNg2Dc5FUjrEYsTcLphvdf3QszQ1P8e rleC6mNmjL8rGSgDuDk2mhzP8SGwMahAxy9nA+h7AOlzQWfbxzFRrjxv2FpezKRby+K9 fGK+TV7K+cQLxRmufyI3KpJaQs4G8Al8wkjEc76UDtUE0wmLjgvVTLRRUw0vBbR23g47 Gc+6lOK7z3VCYWjyggk8J16KtV+E0A+hk2pessVtreB8IHxMwVAMvH0e1Pg3/TZQwPqE 0+E/K47JxwTWtWGAaiYt1301CwXUMp3SmYnLBzJSPbiOoIxu3b/hJroihzXhExZHOHf4 Euog== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=QbNVmbb/Oy+N5CWYEueDFqMF+6Qv00nkT2lV81yBcus=; b=de6+XEtHbofQWhmPC/AKeHn17WtJBeC+Sr2YuN2PfS/VvWnpwbUa6OrlT596qQWNsq IN8Ndeo3dym+rhcoZKZV4Z+rsj2qiWj9a9hEnSmCvOTug+XdeRRSppKObcW+uJ6UkNMp GOiOhkukwDhkVNiwiZdXBF63uyub6kdZL9RuKIFZWYBGbN9kvkonH2ydgEP6Sg6lYFhV mOg0UJRzmFxmY+2OQxWdTBiN4CJmaS0CoMvCcGav9F/C7YT3gHDjJzHK/JoZvFwsJx7e 1I1e1nBv1fFzk05XtX74jhqaA1olhad43Ez4vaiJrbdxaXiWH8euL1Opj8JyXUY/EdD6 T8Dw== X-Gm-Message-State: AOAM533H5IRvjrh68CfcJpr1yE1t/0Dy6pjXFQQeiJfnUYG4UU7ZTokg ThXszkTucex4xOhdtRZXdCl1XS09+NI= X-Google-Smtp-Source: ABdhPJzFf9BbNWHGQuNu1097yoIpbbooIyAzQs9+tUoFo73zzIQ3EgtK+MTbaFiYTpdEg+tmDr0Qvl+1lsY= X-Received: from reiji-vws-sp.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:3d59]) (user=reijiw job=sendgmr) by 2002:a17:90a:284f:: with SMTP id p15mr314268pjf.1.1637132026636; Tue, 16 Nov 2021 22:53:46 -0800 (PST) Date: Tue, 16 Nov 2021 22:43:54 -0800 In-Reply-To: <20211117064359.2362060-1-reijiw@google.com> Message-Id: <20211117064359.2362060-25-reijiw@google.com> Mime-Version: 1.0 References: <20211117064359.2362060-1-reijiw@google.com> X-Mailer: git-send-email 2.34.0.rc1.387.gb447b232ab-goog Subject: [RFC PATCH v3 24/29] KVM: arm64: Trap disabled features of ID_AA64DFR0_EL1 From: Reiji Watanabe To: Marc Zyngier , kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Will Deacon , Andrew Jones , Peng Liang , Peter Shier , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata , Reiji Watanabe Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Add feature_config_ctrl for PMUv3, PMS and TraceFilt, which are indicated in ID_AA64DFR0_EL1, to program configuration registers to trap guest's using those features when they are not exposed to the guest. Signed-off-by: Reiji Watanabe --- arch/arm64/kvm/sys_regs.c | 38 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 73d992ba6e90..cb18d1fe0658 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -437,6 +437,38 @@ static struct feature_config_ctrl ftr_ctrl_mte = { .cfg_val = HCR_TID5, }; +/* For ID_AA64DFR0_EL1 */ +static struct feature_config_ctrl ftr_ctrl_pmuv3 = { + .ftr_reg = SYS_ID_AA64DFR0_EL1, + .ftr_shift = ID_AA64DFR0_PMUVER_SHIFT, + .ftr_min = ID_AA64DFR0_PMUVER_8_0, + .ftr_signed = FTR_UNSIGNED, + .cfg_reg = VCPU_MDCR_EL2, + .cfg_mask = MDCR_EL2_TPM, + .cfg_val = MDCR_EL2_TPM, +}; + +static struct feature_config_ctrl ftr_ctrl_pms = { + .ftr_reg = SYS_ID_AA64DFR0_EL1, + .ftr_shift = ID_AA64DFR0_PMSVER_SHIFT, + .ftr_min = ID_AA64DFR0_PMSVER_8_2, + .ftr_signed = FTR_UNSIGNED, + .cfg_reg = VCPU_MDCR_EL2, + .cfg_mask = (MDCR_EL2_TPMS | + (MDCR_EL2_E2PB_MASK << MDCR_EL2_E2PB_SHIFT)), + .cfg_val = MDCR_EL2_TPMS, +}; + +static struct feature_config_ctrl ftr_ctrl_tracefilt = { + .ftr_reg = SYS_ID_AA64DFR0_EL1, + .ftr_shift = ID_AA64DFR0_TRACE_FILT_SHIFT, + .ftr_min = 1, + .ftr_signed = FTR_UNSIGNED, + .cfg_reg = VCPU_MDCR_EL2, + .cfg_mask = MDCR_EL2_TTRF, + .cfg_val = MDCR_EL2_TTRF, +}; + struct id_reg_info { u32 sys_reg; /* Register ID */ u64 sys_val; /* Sanitized system value */ @@ -952,6 +984,12 @@ static struct id_reg_info id_aa64dfr0_el1_info = { .init = init_id_aa64dfr0_el1_info, .validate = validate_id_aa64dfr0_el1, .get_reset_val = get_reset_id_aa64dfr0_el1, + .trap_features = &(const struct feature_config_ctrl *[]) { + &ftr_ctrl_pmuv3, + &ftr_ctrl_pms, + &ftr_ctrl_tracefilt, + NULL, + }, }; static struct id_reg_info id_dfr0_el1_info = {