| Message ID | 20220106042708.2869332-24-reijiw@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | KVM: arm64: Make CPU ID registers writable by userspace | expand |
Hi Reiji, The series might be missing an entry for ID_AA64MMFR0_EL1, Debug Communications Channel registers, ID_AA64MMFR0_FGT -> MDCR_EL2_TDCC. Cheers, /fuad On Thu, Jan 6, 2022 at 4:29 AM Reiji Watanabe <reijiw@google.com> wrote: > > Add feature_config_ctrl for LORegions, which is indicated in > ID_AA64MMFR1_EL1, to program configuration register to trap > guest's using the feature when it is not exposed to the guest. > > Change trap_loregion() to use vcpu_feature_is_available() > to simplify checking of the feature's availability. > > Signed-off-by: Reiji Watanabe <reijiw@google.com> > --- > arch/arm64/kvm/sys_regs.c | 26 ++++++++++++++++++++++++-- > 1 file changed, 24 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 229671ec3abd..f8a5ee927ecf 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -365,6 +365,11 @@ static void feature_tracefilt_trap_activate(struct kvm_vcpu *vcpu) > feature_trap_activate(vcpu, VCPU_MDCR_EL2, MDCR_EL2_TTRF, 0); > } > > +static void feature_lor_trap_activate(struct kvm_vcpu *vcpu) > +{ > + feature_trap_activate(vcpu, VCPU_HCR_EL2, HCR_TLOR, 0); > +} > + > /* For ID_AA64PFR0_EL1 */ > static struct feature_config_ctrl ftr_ctrl_ras = { > .ftr_reg = SYS_ID_AA64PFR0_EL1, > @@ -416,6 +421,15 @@ static struct feature_config_ctrl ftr_ctrl_tracefilt = { > .trap_activate = feature_tracefilt_trap_activate, > }; > > +/* For ID_AA64MMFR1_EL1 */ > +static struct feature_config_ctrl ftr_ctrl_lor = { > + .ftr_reg = SYS_ID_AA64MMFR1_EL1, > + .ftr_shift = ID_AA64MMFR1_LOR_SHIFT, > + .ftr_min = 1, > + .ftr_signed = FTR_UNSIGNED, > + .trap_activate = feature_lor_trap_activate, > +}; > + > struct id_reg_info { > u32 sys_reg; /* Register ID */ > u64 sys_val; /* Sanitized system value */ > @@ -947,6 +961,14 @@ static struct id_reg_info id_aa64dfr0_el1_info = { > }, > }; > > +static struct id_reg_info id_aa64mmfr1_el1_info = { > + .sys_reg = SYS_ID_AA64MMFR1_EL1, > + .trap_features = &(const struct feature_config_ctrl *[]) { > + &ftr_ctrl_lor, > + NULL, > + }, > +}; > + > static struct id_reg_info id_dfr0_el1_info = { > .sys_reg = SYS_ID_DFR0_EL1, > .init = init_id_dfr0_el1_info, > @@ -976,6 +998,7 @@ static struct id_reg_info *id_reg_info_table[KVM_ARM_ID_REG_MAX_NUM] = { > [IDREG_IDX(SYS_ID_AA64ISAR0_EL1)] = &id_aa64isar0_el1_info, > [IDREG_IDX(SYS_ID_AA64ISAR1_EL1)] = &id_aa64isar1_el1_info, > [IDREG_IDX(SYS_ID_AA64MMFR0_EL1)] = &id_aa64mmfr0_el1_info, > + [IDREG_IDX(SYS_ID_AA64MMFR1_EL1)] = &id_aa64mmfr1_el1_info, > }; > > static int validate_id_reg(struct kvm_vcpu *vcpu, u32 id, u64 val) > @@ -1050,10 +1073,9 @@ static bool trap_loregion(struct kvm_vcpu *vcpu, > struct sys_reg_params *p, > const struct sys_reg_desc *r) > { > - u64 val = __read_id_reg(vcpu, SYS_ID_AA64MMFR1_EL1); > u32 sr = reg_to_encoding(r); > > - if (!(val & (0xfUL << ID_AA64MMFR1_LOR_SHIFT))) { > + if (!vcpu_feature_is_available(vcpu, &ftr_ctrl_lor)) { > kvm_inject_undefined(vcpu); > return false; > } > -- > 2.34.1.448.ga2b2bfdf31-goog > > _______________________________________________ > kvmarm mailing list > kvmarm@lists.cs.columbia.edu > https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Hi Fuad, On Mon, Jan 24, 2022 at 9:38 AM Fuad Tabba <tabba@google.com> wrote: > > Hi Reiji, > > The series might be missing an entry for ID_AA64MMFR0_EL1, Debug > Communications Channel registers, ID_AA64MMFR0_FGT -> MDCR_EL2_TDCC. I will add them in v5 series. Thank you so much for all the review comments! Thanks, Reiji > > Cheers, > /fuad > > > On Thu, Jan 6, 2022 at 4:29 AM Reiji Watanabe <reijiw@google.com> wrote: > > > > Add feature_config_ctrl for LORegions, which is indicated in > > ID_AA64MMFR1_EL1, to program configuration register to trap > > guest's using the feature when it is not exposed to the guest. > > > > Change trap_loregion() to use vcpu_feature_is_available() > > to simplify checking of the feature's availability. > > > > Signed-off-by: Reiji Watanabe <reijiw@google.com> > > --- > > arch/arm64/kvm/sys_regs.c | 26 ++++++++++++++++++++++++-- > > 1 file changed, 24 insertions(+), 2 deletions(-) > > > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > > index 229671ec3abd..f8a5ee927ecf 100644 > > --- a/arch/arm64/kvm/sys_regs.c > > +++ b/arch/arm64/kvm/sys_regs.c > > @@ -365,6 +365,11 @@ static void feature_tracefilt_trap_activate(struct kvm_vcpu *vcpu) > > feature_trap_activate(vcpu, VCPU_MDCR_EL2, MDCR_EL2_TTRF, 0); > > } > > > > +static void feature_lor_trap_activate(struct kvm_vcpu *vcpu) > > +{ > > + feature_trap_activate(vcpu, VCPU_HCR_EL2, HCR_TLOR, 0); > > +} > > + > > /* For ID_AA64PFR0_EL1 */ > > static struct feature_config_ctrl ftr_ctrl_ras = { > > .ftr_reg = SYS_ID_AA64PFR0_EL1, > > @@ -416,6 +421,15 @@ static struct feature_config_ctrl ftr_ctrl_tracefilt = { > > .trap_activate = feature_tracefilt_trap_activate, > > }; > > > > +/* For ID_AA64MMFR1_EL1 */ > > +static struct feature_config_ctrl ftr_ctrl_lor = { > > + .ftr_reg = SYS_ID_AA64MMFR1_EL1, > > + .ftr_shift = ID_AA64MMFR1_LOR_SHIFT, > > + .ftr_min = 1, > > + .ftr_signed = FTR_UNSIGNED, > > + .trap_activate = feature_lor_trap_activate, > > +}; > > + > > struct id_reg_info { > > u32 sys_reg; /* Register ID */ > > u64 sys_val; /* Sanitized system value */ > > @@ -947,6 +961,14 @@ static struct id_reg_info id_aa64dfr0_el1_info = { > > }, > > }; > > > > +static struct id_reg_info id_aa64mmfr1_el1_info = { > > + .sys_reg = SYS_ID_AA64MMFR1_EL1, > > + .trap_features = &(const struct feature_config_ctrl *[]) { > > + &ftr_ctrl_lor, > > + NULL, > > + }, > > +}; > > + > > static struct id_reg_info id_dfr0_el1_info = { > > .sys_reg = SYS_ID_DFR0_EL1, > > .init = init_id_dfr0_el1_info, > > @@ -976,6 +998,7 @@ static struct id_reg_info *id_reg_info_table[KVM_ARM_ID_REG_MAX_NUM] = { > > [IDREG_IDX(SYS_ID_AA64ISAR0_EL1)] = &id_aa64isar0_el1_info, > > [IDREG_IDX(SYS_ID_AA64ISAR1_EL1)] = &id_aa64isar1_el1_info, > > [IDREG_IDX(SYS_ID_AA64MMFR0_EL1)] = &id_aa64mmfr0_el1_info, > > + [IDREG_IDX(SYS_ID_AA64MMFR1_EL1)] = &id_aa64mmfr1_el1_info, > > }; > > > > static int validate_id_reg(struct kvm_vcpu *vcpu, u32 id, u64 val) > > @@ -1050,10 +1073,9 @@ static bool trap_loregion(struct kvm_vcpu *vcpu, > > struct sys_reg_params *p, > > const struct sys_reg_desc *r) > > { > > - u64 val = __read_id_reg(vcpu, SYS_ID_AA64MMFR1_EL1); > > u32 sr = reg_to_encoding(r); > > > > - if (!(val & (0xfUL << ID_AA64MMFR1_LOR_SHIFT))) { > > + if (!vcpu_feature_is_available(vcpu, &ftr_ctrl_lor)) { > > kvm_inject_undefined(vcpu); > > return false; > > } > > -- > > 2.34.1.448.ga2b2bfdf31-goog > > > > _______________________________________________ > > kvmarm mailing list > > kvmarm@lists.cs.columbia.edu > > https://lists.cs.columbia.edu/mailman/listinfo/kvmarm
Hi Fuad, > > The series might be missing an entry for ID_AA64MMFR0_EL1, Debug > > Communications Channel registers, ID_AA64MMFR0_FGT -> MDCR_EL2_TDCC. Looking at Arm ARM, it appears any of the registers that can be trapped by MDCR_EL2_TDCC are present even when FEAT_FGT is not implemented (I understand MDCR_EL2_TDCC is available when FEAT_FGT is implemented though). So, this is not something that the framework is trying to address. Thanks, Reiji > > I will add them in v5 series. > Thank you so much for all the review comments! > > Thanks, > Reiji > > > > > > Cheers, > > /fuad
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 229671ec3abd..f8a5ee927ecf 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -365,6 +365,11 @@ static void feature_tracefilt_trap_activate(struct kvm_vcpu *vcpu) feature_trap_activate(vcpu, VCPU_MDCR_EL2, MDCR_EL2_TTRF, 0); } +static void feature_lor_trap_activate(struct kvm_vcpu *vcpu) +{ + feature_trap_activate(vcpu, VCPU_HCR_EL2, HCR_TLOR, 0); +} + /* For ID_AA64PFR0_EL1 */ static struct feature_config_ctrl ftr_ctrl_ras = { .ftr_reg = SYS_ID_AA64PFR0_EL1, @@ -416,6 +421,15 @@ static struct feature_config_ctrl ftr_ctrl_tracefilt = { .trap_activate = feature_tracefilt_trap_activate, }; +/* For ID_AA64MMFR1_EL1 */ +static struct feature_config_ctrl ftr_ctrl_lor = { + .ftr_reg = SYS_ID_AA64MMFR1_EL1, + .ftr_shift = ID_AA64MMFR1_LOR_SHIFT, + .ftr_min = 1, + .ftr_signed = FTR_UNSIGNED, + .trap_activate = feature_lor_trap_activate, +}; + struct id_reg_info { u32 sys_reg; /* Register ID */ u64 sys_val; /* Sanitized system value */ @@ -947,6 +961,14 @@ static struct id_reg_info id_aa64dfr0_el1_info = { }, }; +static struct id_reg_info id_aa64mmfr1_el1_info = { + .sys_reg = SYS_ID_AA64MMFR1_EL1, + .trap_features = &(const struct feature_config_ctrl *[]) { + &ftr_ctrl_lor, + NULL, + }, +}; + static struct id_reg_info id_dfr0_el1_info = { .sys_reg = SYS_ID_DFR0_EL1, .init = init_id_dfr0_el1_info, @@ -976,6 +998,7 @@ static struct id_reg_info *id_reg_info_table[KVM_ARM_ID_REG_MAX_NUM] = { [IDREG_IDX(SYS_ID_AA64ISAR0_EL1)] = &id_aa64isar0_el1_info, [IDREG_IDX(SYS_ID_AA64ISAR1_EL1)] = &id_aa64isar1_el1_info, [IDREG_IDX(SYS_ID_AA64MMFR0_EL1)] = &id_aa64mmfr0_el1_info, + [IDREG_IDX(SYS_ID_AA64MMFR1_EL1)] = &id_aa64mmfr1_el1_info, }; static int validate_id_reg(struct kvm_vcpu *vcpu, u32 id, u64 val) @@ -1050,10 +1073,9 @@ static bool trap_loregion(struct kvm_vcpu *vcpu, struct sys_reg_params *p, const struct sys_reg_desc *r) { - u64 val = __read_id_reg(vcpu, SYS_ID_AA64MMFR1_EL1); u32 sr = reg_to_encoding(r); - if (!(val & (0xfUL << ID_AA64MMFR1_LOR_SHIFT))) { + if (!vcpu_feature_is_available(vcpu, &ftr_ctrl_lor)) { kvm_inject_undefined(vcpu); return false; }
Add feature_config_ctrl for LORegions, which is indicated in ID_AA64MMFR1_EL1, to program configuration register to trap guest's using the feature when it is not exposed to the guest. Change trap_loregion() to use vcpu_feature_is_available() to simplify checking of the feature's availability. Signed-off-by: Reiji Watanabe <reijiw@google.com> --- arch/arm64/kvm/sys_regs.c | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-)