@@ -494,6 +494,78 @@ static void test_ssch(void)
report_prefix_pop();
}
+static void test_stsch(void)
+{
+ const int align_to = 4;
+ struct schib schib;
+ int cc;
+
+ if (!test_device_sid) {
+ report_skip("No device");
+ return;
+ }
+
+ report_prefix_push("Unaligned");
+ for (int i = 1; i < align_to; i *= 2) {
+ report_prefix_pushf("%d", i);
+
+ expect_pgm_int();
+ stsch(test_device_sid, (struct schib *)(alignment_test_page + i));
+ check_pgm_int_code(PGM_INT_CODE_SPECIFICATION);
+
+ report_prefix_pop();
+ }
+ report_prefix_pop();
+
+ report_prefix_push("Invalid subchannel number");
+ cc = stsch(0x0001ffff, &schib);
+ report(cc == 3, "Channel not operational");
+ report_prefix_pop();
+
+ report_prefix_push("Bit 47 in SID is zero");
+ expect_pgm_int();
+ stsch(0x0000ffff, &schib);
+ check_pgm_int_code(PGM_INT_CODE_OPERAND);
+ report_prefix_pop();
+}
+
+static void test_pmcw_bit5(void)
+{
+ int cc;
+ uint16_t old_pmcw_flags;
+
+ cc = stsch(test_device_sid, &schib);
+ if (cc) {
+ report_fail("stsch: sch %08x failed with cc=%d", test_device_sid, cc);
+ return;
+ }
+ old_pmcw_flags = schib.pmcw.flags;
+
+ report_prefix_push("Bit 5 set");
+
+ schib.pmcw.flags = old_pmcw_flags | BIT(15 - 5);
+ cc = msch(test_device_sid, &schib);
+ report(!cc, "MSCH cc == 0");
+
+ cc = stsch(test_device_sid, &schib);
+ report(!cc, "STSCH cc == 0");
+ report(!(schib.pmcw.flags & BIT(15 - 5)), "STSCH PMCW Bit 5 is clear");
+
+ report_prefix_pop();
+
+ report_prefix_push("Bit 5 clear");
+
+ schib.pmcw.flags = old_pmcw_flags & ~BIT(15 - 5);
+ cc = msch(test_device_sid, &schib);
+ report(!cc, "MSCH cc == 0");
+
+ cc = stsch(test_device_sid, &schib);
+ report(!cc, "STSCH cc == 0");
+ report(!(schib.pmcw.flags & BIT(15 - 5)), "STSCH PMCW Bit 5 is clear");
+
+ report_prefix_pop();
+}
+
static struct {
const char *name;
void (*func)(void);
@@ -509,6 +581,8 @@ static struct {
{ "msch", test_msch },
{ "stcrw", test_stcrw },
{ "ssch", test_ssch },
+ { "stsch", test_stsch },
+ { "pmcw bit 5 ignored", test_pmcw_bit5 },
{ NULL, NULL }
};
css_lib extensively uses STSCH, but two more cases deserve their own tests: - unaligned address for SCHIB. We check for misalignment by 1 and 2 bytes. - channel not operational - bit 47 in SID not set - bit 5 of PMCW flags. As per the principles of operation, bit 5 of the PMCW flags shall be ignored by msch and always stored as zero by stsch. Currently, QEMU requires this bit to always be zero on msch, which is why this test currently fails. A fix was posted upstream ("[PATCH qemu] s390x/css: fix PMCW invalid mask"). Here's the QEMU PMCW invalid mask fix: https://lists.nongnu.org/archive/html/qemu-s390x/2021-12/msg00100.html Signed-off-by: Nico Boehr <nrb@linux.ibm.com> --- s390x/css.c | 74 +++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+)