Message ID | 20220207172216.206415-3-yishaih@nvidia.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Mon, 7 Feb 2022 17:23:14 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by rnnvmail204.nvidia.com (10.129.68.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.9; Mon, 7 Feb 2022 09:23:13 -0800 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.129.68.8) with Microsoft SMTP Server id 15.2.986.9 via Frontend Transport; Mon, 7 Feb 2022 09:23:09 -0800 From: Yishai Hadas <yishaih@nvidia.com> To: <alex.williamson@redhat.com>, <bhelgaas@google.com>, <jgg@nvidia.com>, <saeedm@nvidia.com> CC: <linux-pci@vger.kernel.org>, <kvm@vger.kernel.org>, <netdev@vger.kernel.org>, <kuba@kernel.org>, <leonro@nvidia.com>, <kwankhede@nvidia.com>, <mgurtovoy@nvidia.com>, <yishaih@nvidia.com>, <maorg@nvidia.com>, <ashok.raj@intel.com>, <kevin.tian@intel.com>, <shameerali.kolothum.thodi@huawei.com> Subject: [PATCH V7 mlx5-next 02/15] net/mlx5: Reuse exported virtfn index function call Date: Mon, 7 Feb 2022 19:22:03 +0200 Message-ID: <20220207172216.206415-3-yishaih@nvidia.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20220207172216.206415-1-yishaih@nvidia.com> References: <20220207172216.206415-1-yishaih@nvidia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: adc7a090-6fb0-4868-ae84-08d9ea5e89b7 X-MS-TrafficTypeDiagnostic: BN6PR1201MB0163:EE_ X-Microsoft-Antispam-PRVS: <BN6PR1201MB01630CE419FFDC5E8788CDAAC32C9@BN6PR1201MB0163.namprd12.prod.outlook.com> X-MS-Oob-TLC-OOBClassifiers: OLM:3826; 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Add mlx5 live migration driver and v2 migration protocol
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expand
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diff --git a/drivers/net/ethernet/mellanox/mlx5/core/sriov.c b/drivers/net/ethernet/mellanox/mlx5/core/sriov.c index e8185b69ac6c..24c4b4f05214 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/sriov.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/sriov.c @@ -205,19 +205,8 @@ int mlx5_core_sriov_set_msix_vec_count(struct pci_dev *vf, int msix_vec_count) mlx5_get_default_msix_vec_count(dev, pci_num_vf(pf)); sriov = &dev->priv.sriov; - - /* Reversed translation of PCI VF function number to the internal - * function_id, which exists in the name of virtfn symlink. - */ - for (id = 0; id < pci_num_vf(pf); id++) { - if (!sriov->vfs_ctx[id].enabled) - continue; - - if (vf->devfn == pci_iov_virtfn_devfn(pf, id)) - break; - } - - if (id == pci_num_vf(pf) || !sriov->vfs_ctx[id].enabled) + id = pci_iov_vf_id(vf); + if (id < 0 || !sriov->vfs_ctx[id].enabled) return -EINVAL; return mlx5_set_msix_vec_count(dev, id + 1, msix_vec_count);