diff mbox series

[kvm-unit-tests] s390x: snippets: c: Load initial cr0

Message ID 20220331125515.1941-1-frankja@linux.ibm.com (mailing list archive)
State New, archived
Headers show
Series [kvm-unit-tests] s390x: snippets: c: Load initial cr0 | expand

Commit Message

Janosch Frank March 31, 2022, 12:55 p.m. UTC
As soon as we use C we need to set the AFP bit in cr0 so we can use
all fprs.

Signed-off-by: Janosch Frank <frankja@linux.ibm.com>
---
 s390x/snippets/c/cstart.S | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Claudio Imbrenda March 31, 2022, 2:58 p.m. UTC | #1
On Thu, 31 Mar 2022 12:55:15 +0000
Janosch Frank <frankja@linux.ibm.com> wrote:

> As soon as we use C we need to set the AFP bit in cr0 so we can use
> all fprs.
> 

seems like a good idea

> Signed-off-by: Janosch Frank <frankja@linux.ibm.com>

Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com>

> ---
>  s390x/snippets/c/cstart.S | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/s390x/snippets/c/cstart.S b/s390x/snippets/c/cstart.S
> index aaa5380c..a7d4cd42 100644
> --- a/s390x/snippets/c/cstart.S
> +++ b/s390x/snippets/c/cstart.S
> @@ -12,6 +12,8 @@
>  .section .init
>  	.globl start
>  start:
> +	larl	%r1, initial_cr0
> +	lctlg	%c0, %c0, 0(%r1)
>  	/* XOR all registers with themselves to clear them fully. */
>  	.irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
>  	xgr \i,\i
> @@ -34,3 +36,7 @@ exit:
>  	/* For now let's only use cpu 0 in snippets so this will always work. */
>  	xgr	%r0, %r0
>  	sigp    %r2, %r0, SIGP_STOP
> +
> +initial_cr0:
> +	/* enable AFP-register control, so FP regs (+BFP instr) can be used */
> +	.quad	0x0000000000040000
diff mbox series

Patch

diff --git a/s390x/snippets/c/cstart.S b/s390x/snippets/c/cstart.S
index aaa5380c..a7d4cd42 100644
--- a/s390x/snippets/c/cstart.S
+++ b/s390x/snippets/c/cstart.S
@@ -12,6 +12,8 @@ 
 .section .init
 	.globl start
 start:
+	larl	%r1, initial_cr0
+	lctlg	%c0, %c0, 0(%r1)
 	/* XOR all registers with themselves to clear them fully. */
 	.irp i, 0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15
 	xgr \i,\i
@@ -34,3 +36,7 @@  exit:
 	/* For now let's only use cpu 0 in snippets so this will always work. */
 	xgr	%r0, %r0
 	sigp    %r2, %r0, SIGP_STOP
+
+initial_cr0:
+	/* enable AFP-register control, so FP regs (+BFP instr) can be used */
+	.quad	0x0000000000040000