From patchwork Tue Apr 12 17:32:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Varad Gautam X-Patchwork-Id: 12811051 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47948C433F5 for ; Tue, 12 Apr 2022 17:33:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1352784AbiDLRfZ (ORCPT ); Tue, 12 Apr 2022 13:35:25 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42738 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1358303AbiDLRfF (ORCPT ); Tue, 12 Apr 2022 13:35:05 -0400 Received: from smtp-out1.suse.de (smtp-out1.suse.de [195.135.220.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D78ED5BE49 for ; Tue, 12 Apr 2022 10:32:29 -0700 (PDT) Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by smtp-out1.suse.de (Postfix) with ESMTPS id 89715215FE; Tue, 12 Apr 2022 17:32:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=suse.com; s=susede1; t=1649784748; h=from:from:reply-to:date:date:message-id:message-id:to:to:cc:cc: mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JOznw2/rVQNwAfti2sXZsErpfAdmx9iEccd5lEv0c4g=; b=GS130OoDhZ5eEZMJgbziGbn3dZSJjWKOwNwSYmzJ4+Fl635zbvcdmku2R4AKvuk0VdocQM +APXc+CY3eoL/RVvyWNcp0BjxCWJFBxUKO1GcYFyTsF+aSauBswh3cxY+QGcY5RhvfkLEb XX4y/wc0D99ag/dP/sk61z5cziKNqMw= Received: from imap2.suse-dmz.suse.de (imap2.suse-dmz.suse.de [192.168.254.74]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-521) server-digest SHA512) (No client certificate requested) by imap2.suse-dmz.suse.de (Postfix) with ESMTPS id 009B113780; Tue, 12 Apr 2022 17:32:27 +0000 (UTC) Received: from dovecot-director2.suse.de ([192.168.254.65]) by imap2.suse-dmz.suse.de with ESMTPSA id 2DPOOau3VWJJewAAMHmgww (envelope-from ); Tue, 12 Apr 2022 17:32:27 +0000 From: Varad Gautam To: kvm@vger.kernel.org Cc: pbonzini@redhat.com, drjones@redhat.com, marcorr@google.com, zxwang42@gmail.com, erdemaktas@google.com, rientjes@google.com, seanjc@google.com, brijesh.singh@amd.com, Thomas.Lendacky@amd.com, jroedel@suse.de, bp@suse.de, varad.gautam@suse.com Subject: [PATCH 08/10] x86: Move 32-bit bringup routines to start32.S Date: Tue, 12 Apr 2022 19:32:19 +0200 Message-Id: <20220412173221.13315-8-varad.gautam@suse.com> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20220412173221.13315-1-varad.gautam@suse.com> References: <20220412173221.13315-1-varad.gautam@suse.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org These can be shared across EFI and non-EFI builds. Signed-off-by: Varad Gautam --- x86/cstart64.S | 60 +----------------------------------------------- x86/start32.S | 62 ++++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 63 insertions(+), 59 deletions(-) create mode 100644 x86/start32.S diff --git a/x86/cstart64.S b/x86/cstart64.S index 30012ca..6eb109d 100644 --- a/x86/cstart64.S +++ b/x86/cstart64.S @@ -56,35 +56,13 @@ mb_flags = 0x0 .long mb_magic, mb_flags, 0 - (mb_magic + mb_flags) mb_cmdline = 16 -MSR_GS_BASE = 0xc0000101 - -.macro setup_percpu_area - lea -4096(%esp), %eax - mov $0, %edx - mov $MSR_GS_BASE, %ecx - wrmsr -.endm - .macro load_tss movq %rsp, %rdi call setup_tss ltr %ax .endm -.macro setup_segments - mov $MSR_GS_BASE, %ecx - rdmsr - - mov $0x10, %bx - mov %bx, %ds - mov %bx, %es - mov %bx, %fs - mov %bx, %gs - mov %bx, %ss - - /* restore MSR_GS_BASE */ - wrmsr -.endm +#include "start32.S" .globl start start: @@ -118,33 +96,6 @@ switch_to_5level: call enter_long_mode jmpl $8, $lvl5 -prepare_64: - lgdt gdt_descr - setup_segments - - xor %eax, %eax - mov %eax, %cr4 - -enter_long_mode: - mov %cr4, %eax - bts $5, %eax // pae - mov %eax, %cr4 - - mov pt_root, %eax - mov %eax, %cr3 - -efer = 0xc0000080 - mov $efer, %ecx - rdmsr - bts $8, %eax - wrmsr - - mov %cr0, %eax - bts $0, %eax - bts $31, %eax - mov %eax, %cr0 - ret - smp_stacktop: .long stacktop - 4096 .align 16 @@ -171,15 +122,6 @@ gdt32_descr: .globl sipi_end sipi_end: -.code32 -ap_start32: - setup_segments - mov $-4096, %esp - lock xaddl %esp, smp_stacktop - setup_percpu_area - call prepare_64 - ljmpl $8, $ap_start64 - .code64 save_id: movl $(APIC_DEFAULT_PHYS_BASE + APIC_ID), %eax diff --git a/x86/start32.S b/x86/start32.S new file mode 100644 index 0000000..9e00474 --- /dev/null +++ b/x86/start32.S @@ -0,0 +1,62 @@ +/* Common 32-bit code between EFI and non-EFI bootstrapping. */ + +.code32 + +MSR_GS_BASE = 0xc0000101 + +.macro setup_percpu_area + lea -4096(%esp), %eax + mov $0, %edx + mov $MSR_GS_BASE, %ecx + wrmsr +.endm + +.macro setup_segments + mov $MSR_GS_BASE, %ecx + rdmsr + + mov $0x10, %bx + mov %bx, %ds + mov %bx, %es + mov %bx, %fs + mov %bx, %gs + mov %bx, %ss + + /* restore MSR_GS_BASE */ + wrmsr +.endm + +prepare_64: + lgdt gdt_descr + setup_segments + + xor %eax, %eax + mov %eax, %cr4 + +enter_long_mode: + mov %cr4, %eax + bts $5, %eax // pae + mov %eax, %cr4 + + mov pt_root, %eax + mov %eax, %cr3 + +efer = 0xc0000080 + mov $efer, %ecx + rdmsr + bts $8, %eax + wrmsr + + mov %cr0, %eax + bts $0, %eax + bts $31, %eax + mov %eax, %cr0 + ret + +ap_start32: + setup_segments + mov $-4096, %esp + lock xaddl %esp, smp_stacktop + setup_percpu_area + call prepare_64 + ljmpl $8, $ap_start64