@@ -2601,6 +2601,14 @@ EINVAL.
After the vcpu's SVE configuration is finalized, further attempts to
write this register will fail with EPERM.
+The arm64 ID registers with encoding Op0=3, Op1=0, CRn=0, 1<=CRm<8, 0<=Op2<8
+are allowed to modified by userspace only for AArch64 EL1 vCPUs if
+KVM_CAP_ARM_ID_REG_CONFIGURABLE is available.
+They become immutable after calling KVM_RUN on any of the
+vcpus in the guest (modifying values of those registers will fail).
+Those ID registers are always immutable for AArch32 EL1 vCPUs, which
+KVM_ARM_VCPU_EL1_32BIT is configured for, even when
+KVM_CAP_ARM_ID_REG_CONFIGURABLE is available.
MIPS registers are mapped using the lower 32 bits. The upper 16 of that is
the register group type:
@@ -7724,6 +7732,14 @@ At this time, KVM_PMU_CAP_DISABLE is the only capability. Setting
this capability will disable PMU virtualization for that VM. Usermode
should adjust CPUID leaf 0xA to reflect that the PMU is disabled.
+8.35 KVM_CAP_ARM_ID_REG_CONFIGURABLE
+------------------------------------
+
+:Architectures: arm64
+
+This capability indicates that userspace can modify the ID registers
+via KVM_SET_ONE_REG ioctl.
+
9. Known KVM API problems
=========================
@@ -211,6 +211,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
case KVM_CAP_SET_GUEST_DEBUG:
case KVM_CAP_VCPU_ATTRIBUTES:
case KVM_CAP_PTP_KVM:
+ case KVM_CAP_ARM_ID_REG_CONFIGURABLE:
r = 1;
break;
case KVM_CAP_SET_GUEST_DEBUG2:
@@ -1144,6 +1144,7 @@ struct kvm_ppc_resize_hpt {
#define KVM_CAP_S390_MEM_OP_EXTENSION 211
#define KVM_CAP_PMU_CAPABILITY 212
#define KVM_CAP_DISABLE_QUIRKS2 213
+#define KVM_CAP_ARM_ID_REG_CONFIGURABLE 214
#ifdef KVM_CAP_IRQ_ROUTING
Introduce a new capability KVM_CAP_ARM_ID_REG_CONFIGURABLE to indicate that ID registers are writable by userspace. Signed-off-by: Reiji Watanabe <reijiw@google.com> --- Documentation/virt/kvm/api.rst | 16 ++++++++++++++++ arch/arm64/kvm/arm.c | 1 + include/uapi/linux/kvm.h | 1 + 3 files changed, 18 insertions(+)