diff --git a/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml b/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml
new file mode 100644
index 000000000000..4247a1cff3c1
--- /dev/null
+++ b/Documentation/devicetree/bindings/bus/xlnx,cdx.yaml
@@ -0,0 +1,108 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/misc/xlnx,cdx.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Xilinx CDX bus controller
+
+description: |
+  CDX bus controller for Xilinx devices is implemented to
+  dynamically detect CDX bus and devices on these bus using the
+  firmware. The CDX bus manages multiple FPGA based hardware
+  devices, which can support network, crypto or any other specialized
+  type of device. These FPGA based devices can be added/modified
+  dynamically on run-time.
+
+  All devices on the CDX bus will have a unique streamid (for IOMMU)
+  and a unique device ID (for MSI) corresponding to a requestor ID
+  (one to one associated with the device). The streamid and deviceid
+  are used to configure SMMU and GIC-ITS respectively.
+
+  iommu-map property is used to define the set of stream ids
+  corresponding to each device and the associated IOMMU.
+
+  For generic IOMMU bindings, see:
+  Documentation/devicetree/bindings/iommu/iommu.txt.
+
+  For arm-smmu binding, see:
+  Documentation/devicetree/bindings/iommu/arm,smmu.yaml.
+
+  The MSI writes are accompanied by sideband data (Device ID).
+  The msi-map property is used to associate the devices with the
+  device ID as well as the associated ITS controller.
+
+  For generic MSI bindings, see:
+  Documentation/devicetree/bindings/interrupt-controller/msi.txt.
+
+  For GICv3 and GIC ITS bindings, see:
+  Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml.
+
+maintainers:
+  - Nipun Gupta <nipun.gupta@amd.com>
+  - Nikhil Agarwal <nikhil.agarwal@amd.com>
+
+properties:
+  compatible:
+    const: "xlnx,cdxbus-controller-1.0"
+
+  reg:
+    description: |
+      specifies the CDX firmware region shared memory accessible by the
+      ARM cores.
+
+  iommu-map:
+    description: |
+      Maps device Requestor ID to a stream ID and associated IOMMU. The
+      property is an arbitrary number of tuples of
+      (rid-base,iommu,streamid-base,length).
+
+      Any Requestor ID i in the interval [rid-base, rid-base + length) is
+      associated with the listed IOMMU, with the iommu-specifier
+      (i - streamid-base + streamid-base).
+
+  msi-map:
+    description:
+      Maps an Requestor ID to a GIC ITS and associated msi-specifier
+      data (device ID). The property is an arbitrary number of tuples of
+      (rid-base,gic-its,deviceid-base,length).
+
+      Any Requestor ID in the interval [rid-base, rid-base + length) is
+      associated with the listed GIC ITS, with the msi-specifier
+      (i - rid-base + deviceid-base).
+
+required:
+  - compatible
+  - reg
+  - iommu-map
+  - msi-map
+
+additionalProperties: false
+
+examples:
+  - |
+    smmu@ec000000 {
+        compatible = "arm,smmu-v3";
+        #iommu-cells = <1>;
+        ...
+    };
+
+    gic@e2000000 {
+        compatible = "arm,gic-v3";
+        interrupt-controller;
+        ...
+        its: gic-its@e2040000 {
+            compatible = "arm,gic-v3-its";
+            msi-controller;
+            ...
+        }
+    };
+
+    cdxbus: cdxbus@@4000000 {
+        compatible = "xlnx,cdxbus-controller-1.0";
+        reg = <0x00000000 0x04000000 0 0x1000>;
+        /* define map for RIDs 250-259 */
+        iommu-map = <250 &smmu 250 10>;
+        /* define msi map for RIDs 250-259 */
+        msi-map = <250 &its 250 10>;
+    };
diff --git a/MAINTAINERS b/MAINTAINERS
index 8a5012ba6ff9..32c5be3d6a53 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -22296,6 +22296,12 @@ S:	Maintained
 F:	Documentation/devicetree/bindings/net/can/xilinx,can.yaml
 F:	drivers/net/can/xilinx_can.c
 
+XILINX CDX BUS DRIVER
+M:	Nipun Gupta <nipun.gupta@amd.com>
+M:	Nikhil Agarwal <nikhil.agarwal@amd.com>
+S:	Maintained
+F:	Documentation/devicetree/bindings/bus/xlnx,cdx.yaml
+
 XILINX GPIO DRIVER
 M:	Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
 R:	Srinivas Neeli <srinivas.neeli@xilinx.com>
