@@ -1452,6 +1452,7 @@ static const u32 msrs_to_save_all[] = {
MSR_F15H_PERF_CTR3, MSR_F15H_PERF_CTR4, MSR_F15H_PERF_CTR5,
MSR_IA32_XFD, MSR_IA32_XFD_ERR,
MSR_IA32_XSS,
+ MSR_ARCH_LBR_CTL, MSR_ARCH_LBR_DEPTH,
};
static u32 msrs_to_save[ARRAY_SIZE(msrs_to_save_all)];
@@ -3839,6 +3840,8 @@ int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
case MSR_IA32_PEBS_ENABLE:
case MSR_IA32_DS_AREA:
case MSR_PEBS_DATA_CFG:
+ case MSR_ARCH_LBR_CTL:
+ case MSR_ARCH_LBR_DEPTH:
case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
if (kvm_pmu_is_valid_msr(vcpu, msr))
return kvm_pmu_set_msr(vcpu, msr_info);
@@ -3942,6 +3945,8 @@ int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
case MSR_IA32_PEBS_ENABLE:
case MSR_IA32_DS_AREA:
case MSR_PEBS_DATA_CFG:
+ case MSR_ARCH_LBR_CTL:
+ case MSR_ARCH_LBR_DEPTH:
case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
return kvm_pmu_get_msr(vcpu, msr_info);
@@ -6948,6 +6953,11 @@ static void kvm_init_msr_list(void)
if (!kvm_caps.supported_xss)
continue;
break;
+ case MSR_ARCH_LBR_DEPTH:
+ case MSR_ARCH_LBR_CTL:
+ if (!kvm_cpu_cap_has(X86_FEATURE_ARCH_LBR))
+ continue;
+ break;
default:
break;
}