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Fri, 9 Sep 2022 19:54:54 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1NAM11FT045.mail.protection.outlook.com (10.13.175.181) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.5612.13 via Frontend Transport; Fri, 9 Sep 2022 19:54:54 +0000 Received: from ruby-95f9host.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.28; Fri, 9 Sep 2022 14:54:52 -0500 From: Suravee Suthikulpanit To: , CC: , , Suravee Suthikulpanit , Maxim Levitsky Subject: [PATCH] KVM: x86: Un-inhibit APICv/AVIC when switching to x2APIC mode Date: Fri, 9 Sep 2022 14:54:42 -0500 Message-ID: <20220909195442.7660-1-suravee.suthikulpanit@amd.com> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1NAM11FT045:EE_|BL3PR12MB6377:EE_ X-MS-Office365-Filtering-Correlation-Id: dc8c217d-83ec-4c7b-cd1a-08da929d2a60 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Sep 2022 19:54:54.2823 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: dc8c217d-83ec-4c7b-cd1a-08da929d2a60 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT045.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR12MB6377 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Currently, kvm_lapic_xapic_id_updated() checks if the xAPIC ID in the APIC_ID register differs from the vcpu ID. If so it inhibits APICv/AVIC. However, for vcpu 256 and above, the 8-bit xAPIC ID field in the APIC_ID register cannot support 32-bit x2APIC ID causing the kvm_xapic_id() to return invalid ID and fail the comparison with the vcpu ID. This causes APICv/AVIC inhibition for VM with more than 256 vcpus due to APIVC_INHIBIT_REASON_APIC_ID_MODIFIED. In this case, when guest switch to x2APIC mode, KVM needs to clear APIVC_INHIBIT_REASON_APIC_ID_MODIFIED. Fixes: 3743c2f02517 ("KVM: x86: inhibit APICv/AVIC on changes to APIC ID or APIC base") Cc: Maxim Levitsky Signed-off-by: Suravee Suthikulpanit Reported-by: Suravee Suthikulpanit Signed-off-by: Sean Christopherson --- arch/x86/kvm/lapic.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c index 9dda989a1cf0..750d385b770e 100644 --- a/arch/x86/kvm/lapic.c +++ b/arch/x86/kvm/lapic.c @@ -374,6 +374,7 @@ static inline void kvm_apic_set_x2apic_id(struct kvm_lapic *apic, u32 id) kvm_lapic_set_reg(apic, APIC_ID, id); kvm_lapic_set_reg(apic, APIC_LDR, ldr); atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); + kvm_clear_apicv_inhibit(apic->vcpu->kvm, APICV_INHIBIT_REASON_APIC_ID_MODIFIED); } static inline int apic_lvt_enabled(struct kvm_lapic *apic, int lvt_type)