From patchwork Thu Nov 17 09:19:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suleiman Souhlal X-Patchwork-Id: 13046386 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 796AFC4321E for ; Thu, 17 Nov 2022 09:22:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239509AbiKQJWO (ORCPT ); Thu, 17 Nov 2022 04:22:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46438 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239937AbiKQJVn (ORCPT ); Thu, 17 Nov 2022 04:21:43 -0500 Received: from mail-yw1-x114a.google.com (mail-yw1-x114a.google.com [IPv6:2607:f8b0:4864:20::114a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0075B6D493 for ; Thu, 17 Nov 2022 01:21:40 -0800 (PST) Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-3913a9ff5bfso7115647b3.3 for ; Thu, 17 Nov 2022 01:21:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=dCMmVaAZy6SEs5rn93zweygg0ZuHlWdZWdV2Qs+NB2I=; b=PA95jb1Ll6fyBw/RzDzda4Z3xue/ZmadTIvKZMJ7KgTQ3PiGV8A8zg/QwcyfF8KLRa Pq+e9DBsAbH37cRMI9qQEfThWX+SCTFQso7cuqxrAjA9dySKs1OEJstekKxrkhbNrpSg a9oGX/atVon6FmGWUsIbfm7r9JdA/io9jlxuHAs24Haeti655G52TUTMUUauSr5fVlap kNum1PpKZlxcWy98ULfjDNMWGlZJ0fY0B6HEg5H04FPgnKRM/G1b+k5e2BOgGO0QGYgp TaHnH9ns6kXo/3lRhOXr9V2AMLbnU2Yqcm0DPcRWvL5g9KDiYlQ3BiciLFNLFCPlRV2T 4YPg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=dCMmVaAZy6SEs5rn93zweygg0ZuHlWdZWdV2Qs+NB2I=; b=ZF8t7pGlUQHygBgh6LMvou5XdxKdK5oe2MiZUO7FlhkvkB/W0yDtNLakLjtF0AFd0U 9Glo3hkigZLYicsTsCwTJhQrwIzQkWS/YN2hAsn62e5wc3r/a+wBVYxbb9BdpENvdd0r 2YldCVk5oMoJVfJXU6E/pOlKR2eDE1kTziJDeVeRPJGzxgIM0NVbQOpO6aDDqRs53ZX/ 2N+e8CWJ74OO3uij67aVXyHxIS6H0r9eDQztoYe7MISl4CUgn3i4Nv6rFV2U4U+/Xk0F MVZDTRXPOrfikyBS89V14S//gro9SVPHh36GRhb3vPVnGWNLVJaJdNnsUdfty2oodVR6 +5QQ== X-Gm-Message-State: ANoB5pnrS9P4VduYqm84LetLq3irNm+GFgU4n5xhHNOq1PkL8ZxEZyo3 zjxM/zetHXYZ6BExf0hkpEj1HDg/Ph1qWw== X-Google-Smtp-Source: AA0mqf5m7zH4BQpyAvxlIMNHW6Y2RiB3F8Q+PVkhra4NKQbV65DIREaIl6T9KBIdTHQhgQ25b7poYEkvwX9mqg== X-Received: from suleiman1.tok.corp.google.com ([2401:fa00:8f:203:416e:f3c7:7f1d:6e]) (user=suleiman job=sendgmr) by 2002:a25:e043:0:b0:6dd:26c3:9fbd with SMTP id x64-20020a25e043000000b006dd26c39fbdmr1166819ybg.589.1668676899629; Thu, 17 Nov 2022 01:21:39 -0800 (PST) Date: Thu, 17 Nov 2022 18:19:39 +0900 In-Reply-To: <20221117091952.1940850-1-suleiman@google.com> Message-Id: <20221117091952.1940850-22-suleiman@google.com> Mime-Version: 1.0 References: <20221117091952.1940850-1-suleiman@google.com> X-Mailer: git-send-email 2.38.1.431.g37b22c650d-goog Subject: [PATCH 4.19 21/34] x86/speculation: Fix firmware entry SPEC_CTRL handling From: Suleiman Souhlal To: stable@vger.kernel.org Cc: x86@kernel.org, kvm@vger.kernel.org, bp@alien8.de, pbonzini@redhat.com, peterz@infradead.org, jpoimboe@kernel.org, cascardo@canonical.com, surajjs@amazon.com, ssouhlal@FreeBSD.org, suleiman@google.com Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Josh Poimboeuf commit e6aa13622ea8283cc699cac5d018cc40a2ba2010 upstream. The firmware entry code may accidentally clear STIBP or SSBD. Fix that. Signed-off-by: Josh Poimboeuf Signed-off-by: Peter Zijlstra (Intel) Signed-off-by: Borislav Petkov Signed-off-by: Thadeu Lima de Souza Cascardo Signed-off-by: Greg Kroah-Hartman Signed-off-by: Suleiman Souhlal --- arch/x86/include/asm/nospec-branch.h | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h index ca6e421a3467..c990c3b2ada5 100644 --- a/arch/x86/include/asm/nospec-branch.h +++ b/arch/x86/include/asm/nospec-branch.h @@ -317,18 +317,16 @@ extern u64 spec_ctrl_current(void); */ #define firmware_restrict_branch_speculation_start() \ do { \ - u64 val = x86_spec_ctrl_base | SPEC_CTRL_IBRS; \ - \ preempt_disable(); \ - alternative_msr_write(MSR_IA32_SPEC_CTRL, val, \ + alternative_msr_write(MSR_IA32_SPEC_CTRL, \ + spec_ctrl_current() | SPEC_CTRL_IBRS, \ X86_FEATURE_USE_IBRS_FW); \ } while (0) #define firmware_restrict_branch_speculation_end() \ do { \ - u64 val = x86_spec_ctrl_base; \ - \ - alternative_msr_write(MSR_IA32_SPEC_CTRL, val, \ + alternative_msr_write(MSR_IA32_SPEC_CTRL, \ + spec_ctrl_current(), \ X86_FEATURE_USE_IBRS_FW); \ preempt_enable(); \ } while (0)