Message ID | 20221117091952.1940850-33-suleiman@google.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
Return-Path: <kvm-owner@kernel.org> X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C4914C4332F for <kvm@archiver.kernel.org>; Thu, 17 Nov 2022 09:23:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S239997AbiKQJXC (ORCPT <rfc822;kvm@archiver.kernel.org>); Thu, 17 Nov 2022 04:23:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:46550 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239936AbiKQJWn (ORCPT <rfc822;kvm@vger.kernel.org>); Thu, 17 Nov 2022 04:22:43 -0500 Received: from mail-pf1-x449.google.com (mail-pf1-x449.google.com [IPv6:2607:f8b0:4864:20::449]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 47FE86D4B6 for <kvm@vger.kernel.org>; Thu, 17 Nov 2022 01:22:35 -0800 (PST) Received: by mail-pf1-x449.google.com with SMTP id t30-20020a056a00139e00b0057219940449so879881pfg.13 for <kvm@vger.kernel.org>; Thu, 17 Nov 2022 01:22:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=A7nJ/CGBviLTY2XkbaT91R+gC+cKpJE5wr1H+ewmMtI=; b=jjw/D7dWPdpOQNFeB0YRspYp2WhMX1I2hBYrZ3wzRp5Yw9u/Dal9C6S2QuCpW0G4+2 I+Z3WBdAvBOMylyld4qd4AdjSZVVnTVWPvR/8uaOfXK65lqFE+YY0W/abgy1ikn7F2QV kz6vy5oIrJPFvwhrmRYUCf+yzRzmEb5/ud22R3RRDJROs5Qzgrffj5DgnPtaGetQatvH rnax6CcD57rbZnM3Fgu3mwVGn2l4NaYce7HmRAuPmb1J1JZ0laKeUUoMtu7bg6rVIaYI +yazmpZdsCPB9f8yKNSPQdXf9dUgp6vrDUEAJrvr1ostKXoCZYT4AV/MY/5jMLcJ/Bhy GTEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:references:mime-version:message-id:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=A7nJ/CGBviLTY2XkbaT91R+gC+cKpJE5wr1H+ewmMtI=; b=mz8W85k8yt5Az2DxTHr+eEqgSaWAEDzW8ErsrSIYgpumQyHtLjWjBpFNv4WweNRJLg L1/S/sI22Q0ynP/KIfpSZxk7PNgpwYDjeStEzCsQoKKydDieLWgzHaZoL7OhzqTCwytw MwMnqpzSkuPltkNfi72QXxNo/3yiM7gtPceCfFIe90b8u+DlQViPmfs8q0oZI2X/hzWy CLkudjqGZj3ZZScX5Jp/bsTRfUv1y85544rfeQ1YkSziljTzaNr1YbjNvJgBv6AdCJ2/ LJrcZwswuztbK5uM6ajxtnMhloUdW+zQuIimUUU4MfnZBQITv+mimnOH4lZwQEGgI9zw syAw== X-Gm-Message-State: ANoB5pnC5zo6DSEI435MXDjn03M2A8ikYYkTczhNWyLWAAqZ875LIpwH dgCoH2hrMkuxcxGWFh94zw/oCO64IoxxpA== X-Google-Smtp-Source: AA0mqf7LfAUkn40Nu2yWuUBz9TosZP6VbwA4kovh53NIqzI7jvZV/oP8LxE9diGuZM631fQkktaRXboNieZkuw== X-Received: from suleiman1.tok.corp.google.com ([2401:fa00:8f:203:416e:f3c7:7f1d:6e]) (user=suleiman job=sendgmr) by 2002:a17:90a:a392:b0:20a:fee1:8f69 with SMTP id x18-20020a17090aa39200b0020afee18f69mr809653pjp.0.1668676954384; Thu, 17 Nov 2022 01:22:34 -0800 (PST) Date: Thu, 17 Nov 2022 18:19:50 +0900 In-Reply-To: <20221117091952.1940850-1-suleiman@google.com> Message-Id: <20221117091952.1940850-33-suleiman@google.com> Mime-Version: 1.0 References: <20221117091952.1940850-1-suleiman@google.com> X-Mailer: git-send-email 2.38.1.431.g37b22c650d-goog Subject: [PATCH 4.19 32/34] x86/speculation: Use DECLARE_PER_CPU for x86_spec_ctrl_current From: Suleiman Souhlal <suleiman@google.com> To: stable@vger.kernel.org Cc: x86@kernel.org, kvm@vger.kernel.org, bp@alien8.de, pbonzini@redhat.com, peterz@infradead.org, jpoimboe@kernel.org, cascardo@canonical.com, surajjs@amazon.com, ssouhlal@FreeBSD.org, suleiman@google.com Content-Type: text/plain; charset="UTF-8" Precedence: bulk List-ID: <kvm.vger.kernel.org> X-Mailing-List: kvm@vger.kernel.org |
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Intel RETBleed mitigations for 4.19.
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diff --git a/arch/x86/include/asm/nospec-branch.h b/arch/x86/include/asm/nospec-branch.h index 8bce4004aab2..0a34d5dd4364 100644 --- a/arch/x86/include/asm/nospec-branch.h +++ b/arch/x86/include/asm/nospec-branch.h @@ -11,6 +11,7 @@ #include <asm/cpufeatures.h> #include <asm/msr-index.h> #include <asm/unwind_hints.h> +#include <asm/percpu.h> /* * Fill the CPU return stack buffer. @@ -306,7 +307,7 @@ static inline void indirect_branch_prediction_barrier(void) /* The Intel SPEC CTRL MSR base value cache */ extern u64 x86_spec_ctrl_base; -extern u64 x86_spec_ctrl_current; +DECLARE_PER_CPU(u64, x86_spec_ctrl_current); extern void write_spec_ctrl_current(u64 val, bool force); extern u64 spec_ctrl_current(void);