From patchwork Thu Nov 17 14:32:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Maxim Levitsky X-Patchwork-Id: 13046945 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1C661C4332F for ; Thu, 17 Nov 2022 14:35:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240504AbiKQOfD (ORCPT ); Thu, 17 Nov 2022 09:35:03 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:58706 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S240335AbiKQOeX (ORCPT ); Thu, 17 Nov 2022 09:34:23 -0500 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.129.124]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 72DB47722F for ; Thu, 17 Nov 2022 06:33:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1668695599; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=ps9mGB4FWMNZUhRI7eqw38JkpYxzOMfFPzgwHnz9dQU=; b=TM47knEtFRRA6Gq+5og+Xghrp/9GBkU3e8EVkZBAK2y48z/FvVxLKhAYFzgmmckqqE7IjH tNjR+0wkovxLfW74HlSP0JmFIJRXuRcuVhmNgAV/sU9i7Dz5yIVLXbLNff79YqUT1z58Ap goXqPrwjbU87LyC2aBzBJrhiWhg0wrE= Received: from mimecast-mx02.redhat.com (mx3-rdu2.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id us-mta-389-Jy4x4LlPPDyb9i2N1ngPYQ-1; Thu, 17 Nov 2022 09:33:14 -0500 X-MC-Unique: Jy4x4LlPPDyb9i2N1ngPYQ-1 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.rdu2.redhat.com [10.11.54.6]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 62DAC1C08978; Thu, 17 Nov 2022 14:33:13 +0000 (UTC) Received: from amdlaptop.tlv.redhat.com (dhcp-4-238.tlv.redhat.com [10.35.4.238]) by smtp.corp.redhat.com (Postfix) with ESMTP id DAF482166B29; Thu, 17 Nov 2022 14:33:09 +0000 (UTC) From: Maxim Levitsky To: kvm@vger.kernel.org Cc: Paolo Bonzini , Ingo Molnar , "H. Peter Anvin" , Dave Hansen , linux-kernel@vger.kernel.org, Peter Zijlstra , Thomas Gleixner , Sandipan Das , Daniel Sneddon , Jing Liu , Josh Poimboeuf , Wyes Karny , Borislav Petkov , Babu Moger , Pawan Gupta , Sean Christopherson , Jim Mattson , x86@kernel.org, Maxim Levitsky , Santosh Shukla Subject: [PATCH 07/13] KVM: SVM: Add VNMI support in get/set_nmi_mask Date: Thu, 17 Nov 2022 16:32:36 +0200 Message-Id: <20221117143242.102721-8-mlevitsk@redhat.com> In-Reply-To: <20221117143242.102721-1-mlevitsk@redhat.com> References: <20221117143242.102721-1-mlevitsk@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.1 on 10.11.54.6 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: Santosh Shukla VMCB intr_ctrl bit12 (V_NMI_MASK) is set by the processor when handling NMI in guest and is cleared after the NMI is handled. Treat V_NMI_MASK as read-only in the hypervisor except for the SMM case where hypervisor before entring and after leaving SMM mode requires to set and unset V_NMI_MASK. Adding API(get_vnmi_vmcb) in order to return the correct vmcb for L1 or L2. Maxim: - made set_vnmi_mask/clear_vnmi_mask/is_vnmi_mask warn if called without vNMI enabled - clear IRET intercept in svm_set_nmi_mask even with vNMI Signed-off-by: Santosh Shukla Signed-off-by: Maxim Levitsky --- arch/x86/kvm/svm/svm.c | 18 ++++++++++++++- arch/x86/kvm/svm/svm.h | 52 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 69 insertions(+), 1 deletion(-) diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 08a7b2a0a29f3a..c16f68f6c4f7d7 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -3618,13 +3618,29 @@ static int svm_nmi_allowed(struct kvm_vcpu *vcpu, bool for_injection) static bool svm_get_nmi_mask(struct kvm_vcpu *vcpu) { - return !!(vcpu->arch.hflags & HF_NMI_MASK); + struct vcpu_svm *svm = to_svm(vcpu); + + if (is_vnmi_enabled(svm)) + return is_vnmi_mask_set(svm); + else + return !!(vcpu->arch.hflags & HF_NMI_MASK); } static void svm_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked) { struct vcpu_svm *svm = to_svm(vcpu); + if (is_vnmi_enabled(svm)) { + if (masked) + set_vnmi_mask(svm); + else { + clear_vnmi_mask(svm); + if (!sev_es_guest(vcpu->kvm)) + svm_clr_intercept(svm, INTERCEPT_IRET); + } + return; + } + if (masked) { vcpu->arch.hflags |= HF_NMI_MASK; if (!sev_es_guest(vcpu->kvm)) diff --git a/arch/x86/kvm/svm/svm.h b/arch/x86/kvm/svm/svm.h index f5383104d00580..bf7f4851dee204 100644 --- a/arch/x86/kvm/svm/svm.h +++ b/arch/x86/kvm/svm/svm.h @@ -35,6 +35,7 @@ extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly; extern bool npt_enabled; extern int vgif; extern bool intercept_smi; +extern bool vnmi; enum avic_modes { AVIC_MODE_NONE = 0, @@ -531,6 +532,57 @@ static inline bool is_x2apic_msrpm_offset(u32 offset) (msr < (APIC_BASE_MSR + 0x100)); } +static inline struct vmcb *get_vnmi_vmcb(struct vcpu_svm *svm) +{ + if (!vnmi) + return NULL; + + if (is_guest_mode(&svm->vcpu)) + return svm->nested.vmcb02.ptr; + else + return svm->vmcb01.ptr; +} + +static inline bool is_vnmi_enabled(struct vcpu_svm *svm) +{ + struct vmcb *vmcb = get_vnmi_vmcb(svm); + + if (vmcb) + return !!(vmcb->control.int_ctl & V_NMI_ENABLE); + else + return false; +} + +static inline bool is_vnmi_mask_set(struct vcpu_svm *svm) +{ + struct vmcb *vmcb = get_vnmi_vmcb(svm); + + if (!WARN_ON_ONCE(!vmcb)) + return false; + + return !!(vmcb->control.int_ctl & V_NMI_MASK); +} + +static inline void set_vnmi_mask(struct vcpu_svm *svm) +{ + struct vmcb *vmcb = get_vnmi_vmcb(svm); + + if (!WARN_ON_ONCE(!vmcb)) + return; + + vmcb->control.int_ctl |= V_NMI_MASK; +} + +static inline void clear_vnmi_mask(struct vcpu_svm *svm) +{ + struct vmcb *vmcb = get_vnmi_vmcb(svm); + + if (!WARN_ON_ONCE(!vmcb)) + return; + + vmcb->control.int_ctl &= ~V_NMI_MASK; +} + /* svm.c */ #define MSR_INVALID 0xffffffffU