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Peter Anvin" , Ingo Molnar , Joao Martins , Jonathan Corbet , "Konrad Rzeszutek Wilk" , Paolo Bonzini , Sean Christopherson , Thomas Gleixner , David Woodhouse , Greg Kroah-Hartman , Juergen Gross , Peter Zijlstra , Tony Luck , Tom Lendacky , Alexey Kardashevskiy , , , Subject: [PATCH v4 5/7] x86/cpu: Define a scattered AMD Automatic IBRS feature bit Date: Wed, 30 Nov 2022 19:50:01 -0600 Message-ID: <20221201015003.295769-6-kim.phillips@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221201015003.295769-1-kim.phillips@amd.com> References: <20221201015003.295769-1-kim.phillips@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT025:EE_|DS7PR12MB5959:EE_ X-MS-Office365-Filtering-Correlation-Id: 32834dd2-295f-4ac9-8014-08dad33e93b9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: PXmMy+SaTmF3dkWPmiZ4as4uM+G/mCSqy7ETFPBgK9n8+rZuoo4XQrQDhzqSufEGmjmyUCBWY46rN/hx8mgpHLYhkDfCwGNESVBhWRGm6jQG2zFKGjFS/v7u5NMWQirnzEAmahbZizzdo2mxh63CrrP8M8v87Gxk9hyF4JlgOQi9ZCr2QgA/QMYIoXJONfGq3ISPcXXZ7I0W9XkX/1BxSAK4uywf0+LzXYT5BHfFyFBI55pWjoKoD7oknWNO8SQ7jQyriTt3dVDkKRLdVgX7eGDA9MpvYN3zPi3Y8+I7CegCd3ZnSLNLMcPQHqrH2GjP4R07zYuYSBduxfB4P3HW0N3kVEqUrgBkzyVwK5R1wqBRfvFp+11WYuJTv+Sbn5PZe5RB+R4EnDO6Q34NK5DEKzFJt1KZ16qfK5vkjb6KNMeWxZ3VNPPBMBSx/llCHrAPMuCYLxNsXbhuknExofqZuTKpz1Jn10+PnIxwhDYrAjEd6qqivd+Gb7IWCMStpGiTAxaTqFL47XpR9qOvj7q1NjgGkS/2G70oQuYBejrDeHPPtX997B+uk0s1BrsCOgGYlYLwetyKlsEfEsAv0YjGcYVmB8ih9zrcDW88UcvbdWzILuNhn1hVOLvcH7358zxiGTxmjSDSr8uXWhHPjWa6iYve1rHzGQdPt10KESWXXRh8F7NjPxtm9mDT4Qy5PPCnPUh3nMqv7QFLNzi3LHIpjwrFTuNFpSE4+5T6gGnn+0s= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(39860400002)(346002)(136003)(396003)(376002)(451199015)(40470700004)(36840700001)(46966006)(82740400003)(478600001)(36756003)(82310400005)(40480700001)(26005)(6666004)(7696005)(81166007)(41300700001)(40460700003)(70586007)(356005)(70206006)(8676002)(86362001)(316002)(4326008)(426003)(44832011)(54906003)(7416002)(6916009)(8936002)(5660300002)(336012)(47076005)(2616005)(16526019)(186003)(1076003)(2906002)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 01 Dec 2022 01:51:34.5718 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 32834dd2-295f-4ac9-8014-08dad33e93b9 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT025.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DS7PR12MB5959 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org It's bit 8 of the hardware CPUID 0x80000021 EAX leaf. Signed-off-by: Kim Phillips --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/scattered.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 5ddde18c1ae8..961eb49532b7 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -309,6 +309,7 @@ #define X86_FEATURE_MSR_TSX_CTRL (11*32+20) /* "" MSR IA32_TSX_CTRL (Intel) implemented */ #define X86_FEATURE_NO_NESTED_DATA_BP (11*32+21) /* "" AMD No Nested Data Breakpoints */ #define X86_FEATURE_NULL_SEL_CLR_BASE (11*32+22) /* "" AMD Null Selector Clears Base */ +#define X86_FEATURE_AUTOIBRS (11*32+23) /* AMD Automatic IBRS */ /* Intel-defined CPU features, CPUID level 0x00000007:1 (EAX), word 12 */ #define X86_FEATURE_AVX_VNNI (12*32+ 4) /* AVX VNNI instructions */ diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c index caa03466cd9e..7ae7203cd410 100644 --- a/arch/x86/kernel/cpu/scattered.c +++ b/arch/x86/kernel/cpu/scattered.c @@ -48,6 +48,7 @@ static const struct cpuid_bit cpuid_bits[] = { { X86_FEATURE_NO_NESTED_DATA_BP,CPUID_EAX, 0, 0x80000021, 0 }, { X86_FEATURE_LFENCE_RDTSC, CPUID_EAX, 2, 0x80000021, 0 }, { X86_FEATURE_NULL_SEL_CLR_BASE,CPUID_EAX, 6, 0x80000021, 0 }, + { X86_FEATURE_AUTOIBRS, CPUID_EAX, 8, 0x80000021, 0 }, { X86_FEATURE_PERFMON_V2, CPUID_EAX, 0, 0x80000022, 0 }, { X86_FEATURE_AMD_LBR_V2, CPUID_EAX, 1, 0x80000022, 0 }, { 0, 0, 0, 0, 0 }