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Peter Anvin" , Ingo Molnar , Joao Martins , Jonathan Corbet , Konrad Rzeszutek Wilk , "Paolo Bonzini" , Sean Christopherson , Thomas Gleixner , David Woodhouse , Greg Kroah-Hartman , Juergen Gross , Peter Zijlstra , Tony Luck , Tom Lendacky , "Alexey Kardashevskiy" , , , Subject: [PATCH v7 4/7] x86/cpu, kvm: Add the Null Selector Clears Base feature Date: Mon, 16 Jan 2023 17:01:56 -0600 Message-ID: <20230116230159.1511393-5-kim.phillips@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230116230159.1511393-1-kim.phillips@amd.com> References: <20230116230159.1511393-1-kim.phillips@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000B07A:EE_|MN0PR12MB6150:EE_ X-MS-Office365-Filtering-Correlation-Id: 4c167d6d-804d-476b-17c4-08daf815d15b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: x6tfkbFo9j1M1kTkgM9OJFThoid7IwTJLyfsuZ5mKzTB4dOphDxXVPZTxCNggYQLZr6ptxrDVn4mN90Iq9qnVoeIzSfMYZavk2IvkzH7PiLdRx1Y89zi8DD6ushIMGEYd/HIKMCJllK6avWFx86t1iDqna46LlfyQAadbbXbFM8QTzPH/bx9sYUFdFIo76Gc9QWZqXCiolsnfP5FLWzEwGdgLcH6B08icqNLAFRPpnqzOnozVkMVXmKtAT0NMijQoGcU1anSTa28Ntl8UaSwACvCNQHvKS+rHvYEc8pRG25wbeHjZLvyG+I7lO7Q+9I78cEAD9zAN/cgmB9LXLnE7pa/QHYM34vgEGpoF/gCRF0QIqHMg04QYJhllS2if1K3BGhf8oPBDbAObvQcTKpXdsXIcMlpkZ3z26YraG1OUrpFNiMwcsw+eHJ69H83xNrLf7gft0aeLKoVEFhv5d9RMk+QJ1M3CdvaaiVqylpzxKIYvD6LrM739nohgAiAkqBUh1yBC2x0hlSIdRhydboYcDlQ3zw7Ouu94/5EuS9zncFmTZZdA4OS9bOxTkMOR1wxV5cIyk0nO/vjqsIbGAuR1W2NPCTopfP9iRiml6zimIPKRYLTNPQzFjMZVwgfxyoAxJ7tG1PGisrOU+6uQUPw9ubxPxgY08jz1Dy4jH5Gv5saCTuzb0q48NVzGLBOoDtWkZ8UZZkC7x+jbjUcGi+GuxqKoFisFV30UACp3LM6s3U= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(376002)(136003)(346002)(396003)(39860400002)(451199015)(36840700001)(46966006)(40470700004)(316002)(54906003)(6916009)(8936002)(5660300002)(7416002)(83380400001)(70206006)(4326008)(70586007)(36756003)(8676002)(41300700001)(356005)(426003)(47076005)(81166007)(336012)(2616005)(1076003)(82740400003)(40460700003)(36860700001)(7696005)(86362001)(40480700001)(26005)(186003)(82310400005)(6666004)(16526019)(478600001)(2906002)(44832011)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Jan 2023 23:03:01.5974 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4c167d6d-804d-476b-17c4-08daf815d15b X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000B07A.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN0PR12MB6150 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The Null Selector Clears Base feature was being open-coded for KVM in __do_cpuid_func(). Add it to its newly added CPUID leaf 0x80000021 EAX proper, and propagate it in kvm_set_cpu_caps() instead. Also drop the bit description comments now it's more self-describing. Signed-off-by: Kim Phillips --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kvm/cpuid.c | 10 +++------- 2 files changed, 4 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index b22b2e8fef00..ccef41ff718c 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -431,6 +431,7 @@ /* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */ #define X86_FEATURE_NO_NESTED_DATA_BP (20*32+ 0) /* "" AMD No Nested Data Breakpoints */ #define X86_FEATURE_LFENCE_RDTSC (20*32+ 2) /* "" LFENCE always serializing / synchronizes RDTSC */ +#define X86_FEATURE_NULL_SEL_CLR_BASE (20*32+ 6) /* "" AMD Null Selector Clears Base */ /* * BUG word(s) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index d7a13716b7c8..afa86241f752 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -742,10 +742,12 @@ void kvm_set_cpu_caps(void) F(SME_COHERENT)); kvm_cpu_cap_mask(CPUID_8000_0021_EAX, - F(NO_NESTED_DATA_BP) | F(LFENCE_RDTSC) + F(NO_NESTED_DATA_BP) | F(LFENCE_RDTSC) | F(NULL_SEL_CLR_BASE) ); if (cpu_feature_enabled(X86_FEATURE_LFENCE_RDTSC)) kvm_cpu_cap_set(X86_FEATURE_LFENCE_RDTSC); + if (!static_cpu_has_bug(X86_BUG_NULL_SEG)) + kvm_cpu_cap_set(X86_FEATURE_NULL_SEL_CLR_BASE); kvm_cpu_cap_mask(CPUID_C000_0001_EDX, F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) | @@ -1230,9 +1232,6 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) entry->ebx = entry->ecx = entry->edx = 0; cpuid_entry_override(entry, CPUID_8000_0021_EAX); /* - * Pass down these bits: - * EAX 6 NSCB, Null selector clear base - * * Other defined bits are for MSRs that KVM does not expose: * EAX 3 SPCL, SMM page configuration lock * EAX 13 PCMSR, Prefetch control MSR @@ -1240,10 +1239,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) * KVM doesn't support SMM_CTL. * EAX 9 SMM_CTL MSR is not supported */ - entry->eax &= BIT(6); entry->eax |= BIT(9); - if (!static_cpu_has_bug(X86_BUG_NULL_SEG)) - entry->eax |= BIT(6); break; /*Add support for Centaur's CPUID instruction*/ case 0xC0000000: