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Peter Anvin" , Ingo Molnar , Joao Martins , Jonathan Corbet , Konrad Rzeszutek Wilk , "Paolo Bonzini" , Sean Christopherson , Thomas Gleixner , David Woodhouse , Greg Kroah-Hartman , Juergen Gross , Peter Zijlstra , Tony Luck , Tom Lendacky , "Alexey Kardashevskiy" , , , Subject: [PATCH v7 5/7] x86/cpu, kvm: Add the SMM_CTL MSR not present feature Date: Mon, 16 Jan 2023 17:01:57 -0600 Message-ID: <20230116230159.1511393-6-kim.phillips@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230116230159.1511393-1-kim.phillips@amd.com> References: <20230116230159.1511393-1-kim.phillips@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DS1PEPF0000B074:EE_|PH8PR12MB7279:EE_ X-MS-Office365-Filtering-Correlation-Id: 23e84c55-9cc9-4ca9-5ae2-08daf815d853 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: 4EQlhAM+JVXNigzOusH78Zyg0+8INA+7CO6e3yGv5hRhncBw9lJYvd1oTWx+XvWiDpyEhBSnje+kP9JPJBrzQuRP/IwShvltF+UMgmfr8pv0qqaAh8G2F30zZsYK3LjLLUtIeHR4aaW1ztvPUvVylAD4X5/Eb1RmtljIEYd3h0NbSFrEbk6QOAIyieSQvd1Yhl6q7DVwiAcWGPYSE+FnnlWUpjGUfVzxB7ot4CyWeI06YRBErsOwZsgknpV3pdlYs/XgQJDoxMVfRAPckrphWREFeBhxfNoT0b5mD4jXfOpGHHQAhiuM0tJZClax7/zs+uVPHpBL8PVGO33jpsSMgO2ksTUgEwB4mQj8BemYKOdV3hsHsuWDqu40P+ssPIzZuf+BEShPiYIOvgcP95wgz8WjHKW+9N+HL0MhlAQCV8Rl+/g1zwAIdj8393s0WoIPM0sbOTw8KRTWpdysOumg3mSpftHSZtPgT+NW4zbXq3b4LE+YYA1WTkN+QC/k6I1QIWGbpoCTYHCwVJAdvZFYmXrz3zqk+9iThV67P4IXWZxeuYPNV0HuyLWHVNRxpgLV4DzAvIjHJDXHnG9n+xaLRZgWDKwjPU9GOUeihhe6Q250AJvuAuj6fWw3QupA/MLoEAhuxFT3UMX2ZrDg5usdN3QoRqnSs3mKI1gGUwrO6ptu0v7Qnji+9K5u/CjRePaGxZrn0eZgnbCSXSDRZIJcPhxAdvnaBH1AvvOzfGeVro4= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(136003)(396003)(39860400002)(346002)(376002)(451199015)(36840700001)(40470700004)(46966006)(36756003)(81166007)(40480700001)(356005)(40460700003)(316002)(8676002)(8936002)(54906003)(4326008)(44832011)(5660300002)(41300700001)(70206006)(6916009)(7416002)(70586007)(26005)(186003)(16526019)(86362001)(426003)(336012)(47076005)(7696005)(2616005)(83380400001)(478600001)(1076003)(6666004)(82310400005)(2906002)(82740400003)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 16 Jan 2023 23:03:13.2908 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 23e84c55-9cc9-4ca9-5ae2-08daf815d853 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DS1PEPF0000B074.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR12MB7279 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The SMM_CTL MSR not present feature was being open-coded for KVM in __do_cpuid_func(). Add it to its newly added CPUID leaf 0x80000021 EAX proper, and propagate it in kvm_set_cpu_caps() instead. Also drop the bit description comments now the code is more self-describing, and retain the SmmPgCfgLock and PrefetchCtlMsr feature bit comments at the kvm_cpu_cap_mask() callsite. Signed-off-by: Kim Phillips --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kvm/cpuid.c | 13 +++---------- 2 files changed, 4 insertions(+), 10 deletions(-) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index ccef41ff718c..861d312c7955 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -432,6 +432,7 @@ #define X86_FEATURE_NO_NESTED_DATA_BP (20*32+ 0) /* "" AMD No Nested Data Breakpoints */ #define X86_FEATURE_LFENCE_RDTSC (20*32+ 2) /* "" LFENCE always serializing / synchronizes RDTSC */ #define X86_FEATURE_NULL_SEL_CLR_BASE (20*32+ 6) /* "" AMD Null Selector Clears Base */ +#define X86_FEATURE_NO_SMM_CTL_MSR (20*32+ 9) /* "" AMD SMM_CTL MSR is not present */ /* * BUG word(s) diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index afa86241f752..9ba75ad9d976 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -742,12 +742,14 @@ void kvm_set_cpu_caps(void) F(SME_COHERENT)); kvm_cpu_cap_mask(CPUID_8000_0021_EAX, - F(NO_NESTED_DATA_BP) | F(LFENCE_RDTSC) | F(NULL_SEL_CLR_BASE) + F(NO_NESTED_DATA_BP) | F(LFENCE_RDTSC) | 0 /* SmmPgCfgLock */ | + F(NULL_SEL_CLR_BASE) | 0 /* PrefetchCtlMsr */ ); if (cpu_feature_enabled(X86_FEATURE_LFENCE_RDTSC)) kvm_cpu_cap_set(X86_FEATURE_LFENCE_RDTSC); if (!static_cpu_has_bug(X86_BUG_NULL_SEG)) kvm_cpu_cap_set(X86_FEATURE_NULL_SEL_CLR_BASE); + kvm_cpu_cap_set(X86_FEATURE_NO_SMM_CTL_MSR); kvm_cpu_cap_mask(CPUID_C000_0001_EDX, F(XSTORE) | F(XSTORE_EN) | F(XCRYPT) | F(XCRYPT_EN) | @@ -1231,15 +1233,6 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function) case 0x80000021: entry->ebx = entry->ecx = entry->edx = 0; cpuid_entry_override(entry, CPUID_8000_0021_EAX); - /* - * Other defined bits are for MSRs that KVM does not expose: - * EAX 3 SPCL, SMM page configuration lock - * EAX 13 PCMSR, Prefetch control MSR - * - * KVM doesn't support SMM_CTL. - * EAX 9 SMM_CTL MSR is not supported - */ - entry->eax |= BIT(9); break; /*Add support for Centaur's CPUID instruction*/ case 0xC0000000: