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Peter Anvin" , Ingo Molnar , Joao Martins , Jonathan Corbet , Konrad Rzeszutek Wilk , "Paolo Bonzini" , Sean Christopherson , Thomas Gleixner , David Woodhouse , Greg Kroah-Hartman , Juergen Gross , Peter Zijlstra , Tony Luck , Tom Lendacky , "Alexey Kardashevskiy" , , , Subject: [PATCH v8 5/8] x86/cpu, kvm: Add the Null Selector Clears Base feature Date: Mon, 23 Jan 2023 16:56:57 -0600 Message-ID: <20230123225700.2224063-6-kim.phillips@amd.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230123225700.2224063-1-kim.phillips@amd.com> References: <20230123225700.2224063-1-kim.phillips@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN8NAM11FT007:EE_|SA0PR12MB7001:EE_ X-MS-Office365-Filtering-Correlation-Id: ea2e7d54-2ca8-4f16-137b-08dafd954f8d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: SZJAG7n2N1bagPCE/zJNZ9QwldmZST2jwA2rgHJbxxJdk2YMnuKXdcSitVgLZdTZCb47onJgzIKGMv25kVHHTEc5jkM3eeYiIiIwNH5W79IOzEyOEHyfS/g3N9HDfe8KohrRhCZID/jSZ6ad6PqfuXjOIZcIlgbtouU5K9zTQCIBlwsr8MMux4M6d7LtaO2/su2/MfXPFgmhgfoXmhEAsOVRKM8HtCm+yxK0i6y7jhePNJGBSHIiY5f2aVgpfpOisnXyMIlWKyrA6NlUE9i1Z9MOdlt9Fw4qit3vGnJ5Rx17U4CKOhYiFnaH3158EL72nTVxrgFxZxGNBAtLYnjVtHUEPnp7E8DLbcWoKW1jSPM7DfI98LQalnW3OQapvNwDH+Bx6qr7aVIHlnWgWPSexMwmtu6vf/9XBDJGf1Q8Wv4cZeN6MzL2zTOkfnqjhQC3u4TQvIaUX8sW4qBch6w2X3O9N/NCSlwptEbX4PIR/sKOTITA2Aa3bkEbqbN0sevr+V1m9OMXkeQC28gyPZS8vO3mzTNX49g3Kq5V5d1L932Fi1GGVVgsFvy8eOO8nadLNFOFI3ITMOR+Y3AGvj31ADbj7BAdh2Stdh7EHnqWxe/D7CYmQYx/IQv8qNdQI/7irUBtWpCb1SXIzI3mJDZRGOXbLDLQ9uRUa9Xj+oC442En51mglUQS/WNKmCyHYoyuyuUagtnLLay4suy8+5PxJayLMrkSoC+vJmCKb2oZslk= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(346002)(136003)(39860400002)(376002)(396003)(451199015)(46966006)(40470700004)(36840700001)(8936002)(316002)(7696005)(40460700003)(6666004)(86362001)(36756003)(478600001)(5660300002)(83380400001)(426003)(336012)(82310400005)(47076005)(54906003)(6916009)(81166007)(2906002)(70206006)(8676002)(7416002)(40480700001)(2616005)(44832011)(82740400003)(1076003)(16526019)(70586007)(186003)(26005)(356005)(4326008)(41300700001)(36860700001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Jan 2023 22:58:15.2477 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: ea2e7d54-2ca8-4f16-137b-08dafd954f8d X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT007.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA0PR12MB7001 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org The Null Selector Clears Base feature was being open-coded for KVM. Add it to its newly added native CPUID leaf 0x80000021 EAX proper. Also drop the bit description comments now it's more self-describing. [ bp: Convert test in check_null_seg_clears_base() too. ] Signed-off-by: Kim Phillips --- arch/x86/include/asm/cpufeatures.h | 1 + arch/x86/kernel/cpu/common.c | 4 +--- arch/x86/kvm/cpuid.c | 4 ++-- 3 files changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 4f22d828c753..403a534691cc 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h @@ -431,6 +431,7 @@ /* AMD-defined Extended Feature 2 EAX, CPUID level 0x80000021 (EAX), word 20 */ #define X86_FEATURE_NO_NESTED_DATA_BP (20*32+ 0) /* "" No Nested Data Breakpoints */ #define X86_FEATURE_LFENCE_RDTSC (20*32+ 2) /* "" LFENCE always serializing / synchronizes RDTSC */ +#define X86_FEATURE_NULL_SEL_CLR_BASE (20*32+ 6) /* "" Null Selector Clears Base */ /* * BUG word(s) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index 094dbcd63f2a..162352d42ce0 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -1685,9 +1685,7 @@ void check_null_seg_clears_base(struct cpuinfo_x86 *c) if (!IS_ENABLED(CONFIG_X86_64)) return; - /* Zen3 CPUs advertise Null Selector Clears Base in CPUID. */ - if (c->extended_cpuid_level >= 0x80000021 && - cpuid_eax(0x80000021) & BIT(6)) + if (cpu_has(c, X86_FEATURE_NULL_SEL_CLR_BASE)) return; /* diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 601eeb03ebc9..f1625a58b5ec 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -743,12 +743,12 @@ void kvm_set_cpu_caps(void) kvm_cpu_cap_mask(CPUID_8000_0021_EAX, F(NO_NESTED_DATA_BP) | F(LFENCE_RDTSC) | 0 /* SmmPgCfgLock */ | - BIT(6) /* NULL_SEL_CLR_BASE */ | 0 /* PrefetchCtlMsr */ + F(NULL_SEL_CLR_BASE) | 0 /* PrefetchCtlMsr */ ); if (cpu_feature_enabled(X86_FEATURE_LFENCE_RDTSC)) kvm_cpu_cap_set(X86_FEATURE_LFENCE_RDTSC); if (!static_cpu_has_bug(X86_BUG_NULL_SEG)) - kvm_cpu_caps[CPUID_8000_0021_EAX] |= BIT(6) /* NULL_SEL_CLR_BASE */; + kvm_cpu_cap_set(X86_FEATURE_NULL_SEL_CLR_BASE); kvm_cpu_caps[CPUID_8000_0021_EAX] |= BIT(9) /* NO_SMM_CTL_MSR */; kvm_cpu_cap_mask(CPUID_C000_0001_EDX,