From patchwork Tue Feb 21 16:36:46 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mingwei Zhang X-Patchwork-Id: 13148198 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26ED5C61DA3 for ; Tue, 21 Feb 2023 16:37:35 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234806AbjBUQhd (ORCPT ); Tue, 21 Feb 2023 11:37:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:35152 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234527AbjBUQha (ORCPT ); Tue, 21 Feb 2023 11:37:30 -0500 Received: from mail-yw1-x1149.google.com (mail-yw1-x1149.google.com [IPv6:2607:f8b0:4864:20::1149]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E32328D2E for ; Tue, 21 Feb 2023 08:37:25 -0800 (PST) Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-536e8d6d9ceso9185597b3.12 for ; Tue, 21 Feb 2023 08:37:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=b5cXkH41Dpz3xl6Z7o6kxBjd79dMhYH0BWx6BfiSfBo=; b=CZqHake47gq3cd03ZUsZh+xOkan8dZo2tmN+vrMtOJQriJNPTqmfglWH2l9ManWKVJ ze1EbMlWwtI2gznNO6XbtWUxOWwDC4cTM7CUf6WrRBL5FWgdYDu3fcCNnA9+BWCDiMYp i4GHjTBuI9ijI9LjZWNWantpodnjMqpS1kNGyrFtoSUd8vz1GJdeEtRhXpqBq3D8DSC8 5cUNM3sbtaxkSj2cJvJ4tDH9/kZlZ075/b2Lh7toAGX7RwWHeFQe/XA0pO7iCSbCjtIo A7C2ltL8CxMbBRvN3g61e/lXrHTT0bZJG3OAKapt8gRsAB8tv0bxsF/81Gp26/Tfmo4+ D9cQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=b5cXkH41Dpz3xl6Z7o6kxBjd79dMhYH0BWx6BfiSfBo=; b=44YLblAPu9ozJiCg3XuAYIh8QAS9aSGCaSmnLnBvmCT91UjktJ8ygH0YLnsD3IUTZT TC9B8CZHpU6ZiMUhk0k7vdEnWExkouTnEMeSvr4EY4IwWHSRqUl6+ktRgpQZHFJhjVJs ASGJUnDNjfQmBu9lXAHL3NiImnhJiZf5rtmHWRh30ajzVk5FAR3jvUBFJdpfHxEwI/GS wY2RAUnFsZhTEbU4SjxOlW3eMbBY9L5dJl1+mUNTjJTyuARw9LF6VFpfHK6YY2EwNCKE hVhoCKBFTsArSqduQ3QpECwybNA/hcbhC6JQAb9UAsy+DylvDc1ps44ATm8rg6zfhp76 mARg== X-Gm-Message-State: AO0yUKXPVcbmWACAb/9CqC9wqMHcReBGXjipsDw2y5YVb1p9A0VmUVih AiEgGlUy39XySov6yWvV6mzKpT+1kTAg X-Google-Smtp-Source: AK7set+lsrO0DRQyUKeLS34m+CI/REvkWAnKXiFjmVCheEFMJ7XVJNdadgKb6R5DIHKliO32zKTKPYD50nIW X-Received: from mizhang-super.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:1071]) (user=mizhang job=sendgmr) by 2002:a25:828a:0:b0:959:9937:49ce with SMTP id r10-20020a25828a000000b00959993749cemr1788344ybk.188.1676997444339; Tue, 21 Feb 2023 08:37:24 -0800 (PST) Reply-To: Mingwei Zhang Date: Tue, 21 Feb 2023 16:36:46 +0000 In-Reply-To: <20230221163655.920289-1-mizhang@google.com> Mime-Version: 1.0 References: <20230221163655.920289-1-mizhang@google.com> X-Mailer: git-send-email 2.39.2.637.g21b0678d19-goog Message-ID: <20230221163655.920289-5-mizhang@google.com> Subject: [PATCH v3 04/13] KVM: selftests: x86: Enable checking on xcomp_bv in amx_test From: Mingwei Zhang To: Sean Christopherson , Paolo Bonzini , Thomas Gleixner Cc: "H. Peter Anvin" , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, Mingwei Zhang , Jim Mattson , Venkatesh Srinivas , Aaron Lewis , "Chang S. Bae" , Chao Gao Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org After tilerelease instruction, AMX tiles are in INIT state. According to Intel SDM vol 1. 13.10: "If RFBM[i] = 1, XSTATE_BV[i] is set to the value of XINUSE[i].", XSTATE_BV[18] should be cleared after xsavec. On the other hand, according to Intel SDM vol 1. 13.4.3: "If XCOMP_BV[i] = 1, state component i is located at a byte offset locationI from the base address of the XSAVE area". Since at the time of xsavec, XCR0[18] is set indicating AMX tile data component is still enabled, xcomp_bv[18] should be set. Complete the checks by adding the assert to xcomp_bv[18] after xsavec. Signed-off-by: Mingwei Zhang --- tools/testing/selftests/kvm/x86_64/amx_test.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index 16c857c1052e..ba8c0afdbac8 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -197,6 +197,7 @@ static void __attribute__((__flatten__)) guest_code(struct tile_config *amx_cfg, xstate->header.xstate_bv = XFEATURE_MASK_XTILEDATA; __xsavec(xstate, XFEATURE_MASK_XTILEDATA); GUEST_ASSERT(!(xstate->header.xstate_bv & XFEATURE_MASK_XTILEDATA)); + GUEST_ASSERT((xstate->header.xcomp_bv & XFEATURE_MASK_XTILEDATA)); /* xfd=0x40000, disable amx tiledata */ wrmsr(MSR_IA32_XFD, XFEATURE_MASK_XTILEDATA);