| Message ID | 20230221163655.920289-6-mizhang@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Overhauling amx_test | expand |
On Tue, Feb 21, 2023, Mingwei Zhang wrote: > Add check of CR0.TS[bit 3] before the check of IA32_XFD_ERR in the #NM > handler in amx_test. This is because XFD may not be the only reason of > the IA32_XFD MSR and the bitmap corresponding to the state components > required by the faulting instruction." (Intel SDM vol 1. Section 13.14) > > Add the missing check of CR0.TS. The check is not missing. CR0.TS is never set in selftests, i.e. this is pure paranoia. I've no objection to adding the paranoid check, but it should not presented as a "flaw" in the existing code.
diff --git a/tools/testing/selftests/kvm/x86_64/amx_test.c b/tools/testing/selftests/kvm/x86_64/amx_test.c index ba8c0afdbac8..ac49b14460b6 100644 --- a/tools/testing/selftests/kvm/x86_64/amx_test.c +++ b/tools/testing/selftests/kvm/x86_64/amx_test.c @@ -216,6 +216,7 @@ void guest_nm_handler(struct ex_regs *regs) { /* Check if #NM is triggered by XFEATURE_MASK_XTILEDATA */ GUEST_SYNC(7); + GUEST_ASSERT((get_cr0() & X86_CR0_TS) == 0); GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA); GUEST_SYNC(8); GUEST_ASSERT(rdmsr(MSR_IA32_XFD_ERR) == XFEATURE_MASK_XTILEDATA);
Add check of CR0.TS[bit 3] before the check of IA32_XFD_ERR in the #NM handler in amx_test. This is because XFD may not be the only reason of the IA32_XFD MSR and the bitmap corresponding to the state components required by the faulting instruction." (Intel SDM vol 1. Section 13.14) Add the missing check of CR0.TS. Signed-off-by: Mingwei Zhang <mizhang@google.com> --- tools/testing/selftests/kvm/x86_64/amx_test.c | 1 + 1 file changed, 1 insertion(+)