@@ -1025,6 +1025,31 @@ int nested_svm_vmexit(struct vcpu_svm *svm)
svm_switch_vmcb(svm, &svm->vmcb01);
+ /* Note about synchronizing some of int_ctl bits from vmcb02 to vmcb01:
+ *
+ * V_IRQ, V_IRQ_VECTOR, V_INTR_PRIO_MASK, V_IGN_TPR:
+ * If the L1 doesn't intercept interrupts, then
+ * (even if the L1 does use virtual interrupt masking),
+ * KVM will use the vmcb02's V_INTR to detect interrupt window.
+ *
+ * In this case, the KVM raises KVM_REQ_EVENT to ensure that interrupt
+ * window is not lost and KVM implicitly V_IRQ bit from vmcb02 to vmcb01
+ *
+ * V_TPR:
+ * If the L1 doesn't use virtual interrupt masking, then the L1's vTPR
+ * is stored in the vmcb02 but its value doesn't need to be copied
+ * from/to vmcb01 because it is copied from/to the TPR APIC's register
+ * on each VM entry/exit.
+ *
+ * V_GIF:
+ * If the nested vGIF is not used, KVM uses vmcb02's V_GIF for L1's
+ * V_GIF, however, the L1 vGIF is reset to false on each VM exit, thus
+ * there is no need to copy it from vmcb02 to vmcb01.
+ */
+
+ if (!nested_exit_on_intr(svm))
+ kvm_make_request(KVM_REQ_EVENT, &svm->vcpu);
+
if (unlikely(svm->lbrv_enabled && (svm->nested.ctl.virt_ext & LBR_CTL_ENABLE_MASK))) {
svm_copy_lbrs(vmcb12, vmcb02);
svm_update_lbrv(vcpu);