From patchwork Tue Mar 7 02:39:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Li, Xin3" X-Patchwork-Id: 13162690 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C7C7FC64EC4 for ; Tue, 7 Mar 2023 03:06:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230368AbjCGDGI (ORCPT ); Mon, 6 Mar 2023 22:06:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:43232 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230263AbjCGDFc (ORCPT ); Mon, 6 Mar 2023 22:05:32 -0500 Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CF6697D55C; Mon, 6 Mar 2023 19:05:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1678158327; x=1709694327; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bMX4XCzIvBalTCdycaBebYL7w+KbpVnH8+oaUrz4fJQ=; b=CffSI0+/g7LjPhmA5W+ssqt21YMPeaSrzXCxTG68kwXWIopFlk4AkA66 FpeMofkqgt8ZQXYGc1nuIux88qxdnY78LOr/vObtQnL/qGdi+5stZDj6+ yvA+NDiIa2RKS1/XYJqBYR4Slb/Ts5VgdsKh9c7rYUKM4K1WJRj7kKJrF cNxt/01exo0r4TDfsomfJahtV5k7gfeIw5suXgiQznG9DeUzWJ02Z8SuL LC6vWt7bN4S6o6ZQUaReOKIlJVpxv2QAPy87jAjifY5KvnwSIWI1/BWnQ scnCFlHFMcZvXDOvurB8EJvFICti7/SMU+3BRHdvNHVTyyoaXU+K37BII g==; X-IronPort-AV: E=McAfee;i="6500,9779,10641"; a="338072448" X-IronPort-AV: E=Sophos;i="5.98,238,1673942400"; d="scan'208";a="338072448" Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Mar 2023 19:05:16 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10641"; a="676409822" X-IronPort-AV: E=Sophos;i="5.98,238,1673942400"; d="scan'208";a="676409822" Received: from unknown (HELO fred..) ([172.25.112.68]) by orsmga002.jf.intel.com with ESMTP; 06 Mar 2023 19:05:15 -0800 From: Xin Li To: linux-kernel@vger.kernel.org, x86@kernel.org, kvm@vger.kernel.org Cc: tglx@linutronix.de, mingo@redhat.com, bp@alien8.de, dave.hansen@linux.intel.com, hpa@zytor.com, peterz@infradead.org, andrew.cooper3@citrix.com, seanjc@google.com, pbonzini@redhat.com, ravi.v.shankar@intel.com Subject: [PATCH v5 15/34] x86/fred: make unions for the cs and ss fields in struct pt_regs Date: Mon, 6 Mar 2023 18:39:27 -0800 Message-Id: <20230307023946.14516-16-xin3.li@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230307023946.14516-1-xin3.li@intel.com> References: <20230307023946.14516-1-xin3.li@intel.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org From: "H. Peter Anvin (Intel)" Make the cs and ss fields in struct pt_regs unions between the actual selector and the unsigned long stack slot. FRED uses this space to store additional flags. The printk changes are simply due to the cs and ss fields changed to unsigned short from unsigned long. Signed-off-by: H. Peter Anvin (Intel) Tested-by: Shan Kang Signed-off-by: Xin Li --- Changes since v3: * Rename csl/ssl of the pt_regs structure to csx/ssx (x for extended) (Andrew Cooper). --- arch/x86/entry/vsyscall/vsyscall_64.c | 2 +- arch/x86/include/asm/ptrace.h | 36 ++++++++++++++++++++++++--- arch/x86/kernel/process_64.c | 2 +- 3 files changed, 34 insertions(+), 6 deletions(-) diff --git a/arch/x86/entry/vsyscall/vsyscall_64.c b/arch/x86/entry/vsyscall/vsyscall_64.c index d234ca797e4a..2429ad0df068 100644 --- a/arch/x86/entry/vsyscall/vsyscall_64.c +++ b/arch/x86/entry/vsyscall/vsyscall_64.c @@ -76,7 +76,7 @@ static void warn_bad_vsyscall(const char *level, struct pt_regs *regs, if (!show_unhandled_signals) return; - printk_ratelimited("%s%s[%d] %s ip:%lx cs:%lx sp:%lx ax:%lx si:%lx di:%lx\n", + printk_ratelimited("%s%s[%d] %s ip:%lx cs:%x sp:%lx ax:%lx si:%lx di:%lx\n", level, current->comm, task_pid_nr(current), message, regs->ip, regs->cs, regs->sp, regs->ax, regs->si, regs->di); diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h index f4db78b09c8f..a61d860dc33c 100644 --- a/arch/x86/include/asm/ptrace.h +++ b/arch/x86/include/asm/ptrace.h @@ -82,13 +82,41 @@ struct pt_regs { * On hw interrupt, it's IRQ number: */ unsigned long orig_ax; -/* Return frame for iretq */ + + /* Return frame for iretq/eretu/erets */ unsigned long ip; - unsigned long cs; + union { + unsigned long csx; /* cs extended: CS + any fields above it */ + struct __attribute__((__packed__)) { + unsigned short cs; /* CS selector proper */ + unsigned int current_stack_level: 2; + unsigned int __csx_resv1 : 6; + unsigned int interrupt_shadowed : 1; + unsigned int software_initiated : 1; + unsigned int __csx_resv2 : 2; + unsigned int nmi : 1; + unsigned int __csx_resv3 : 3; + unsigned int __csx_resv4 : 32; + }; + }; unsigned long flags; unsigned long sp; - unsigned long ss; -/* top of stack page */ + union { + unsigned long ssx; /* ss extended: SS + any fields above it */ + struct __attribute__((__packed__)) { + unsigned short ss; /* SS selector proper */ + unsigned int __ssx_resv1 : 16; + unsigned int vector : 8; + unsigned int __ssx_resv2 : 8; + unsigned int type : 4; + unsigned int __ssx_resv3 : 4; + unsigned int enclv : 1; + unsigned int long_mode : 1; + unsigned int nested : 1; + unsigned int __ssx_resv4 : 1; + unsigned int instr_len : 4; + }; + }; }; #endif /* !__i386__ */ diff --git a/arch/x86/kernel/process_64.c b/arch/x86/kernel/process_64.c index 4e34b3b68ebd..57de166dc61c 100644 --- a/arch/x86/kernel/process_64.c +++ b/arch/x86/kernel/process_64.c @@ -116,7 +116,7 @@ void __show_regs(struct pt_regs *regs, enum show_regs_mode mode, printk("%sFS: %016lx(%04x) GS:%016lx(%04x) knlGS:%016lx\n", log_lvl, fs, fsindex, gs, gsindex, shadowgs); - printk("%sCS: %04lx DS: %04x ES: %04x CR0: %016lx\n", + printk("%sCS: %04x DS: %04x ES: %04x CR0: %016lx\n", log_lvl, regs->cs, ds, es, cr0); printk("%sCR2: %016lx CR3: %016lx CR4: %016lx\n", log_lvl, cr2, cr3, cr4);