| Message ID | 20230315155445.1688249-4-nsg@linux.ibm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | s390x: Add misaligned instruction tests | expand |
On 3/15/23 16:54, Nina Schoetterl-Glausch wrote: > The EXECUTE instruction executes the instruction at the given target > address. This address must be halfword aligned, otherwise a > specification exception occurs. > Add a test for this. > > Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> > --- > s390x/spec_ex.c | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c > index 83b8c58e..5fa05dba 100644 > --- a/s390x/spec_ex.c > +++ b/s390x/spec_ex.c > @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void) > return 0; > } > > +static int odd_ex_target(void) > +{ > + uint64_t pre_target_addr; > + int to = 0, from = 0x0dd; > + > + asm volatile ( ".pushsection .text.ex_odd\n" > + " .balign 2\n" > + "pre_odd_ex_target:\n" > + " . = . + 1\n" > + " lr %[to],%[from]\n" > + " .popsection\n" > + > + " larl %[pre_target_addr],pre_odd_ex_target\n" > + " ex 0,1(%[pre_target_addr])\n" > + : [pre_target_addr] "=&a" (pre_target_addr), > + [to] "+d" (to) > + : [from] "d" (from) > + ); > + > + assert((pre_target_addr + 1) & 1); > + report(to != from, "did not perform ex with odd target"); > + return 0; > +} > + > static int bad_alignment(void) > { > uint32_t words[5] __attribute__((aligned(16))); > @@ -218,6 +242,7 @@ static const struct spec_ex_trigger spec_ex_triggers[] = { > { "psw_bit_12_is_1", &psw_bit_12_is_1, false, &fixup_invalid_psw }, > { "short_psw_bit_12_is_0", &short_psw_bit_12_is_0, false, &fixup_invalid_psw }, > { "psw_odd_address", &psw_odd_address, false, &fixup_invalid_psw }, > + { "odd_ex_target", &odd_ex_target, true, NULL }, > { "bad_alignment", &bad_alignment, true, NULL }, > { "not_even", ¬_even, true, NULL }, > { NULL, NULL, false, NULL },
On 15/03/2023 16.54, Nina Schoetterl-Glausch wrote: > The EXECUTE instruction executes the instruction at the given target > address. This address must be halfword aligned, otherwise a > specification exception occurs. > Add a test for this. > > Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> > --- > s390x/spec_ex.c | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c > index 83b8c58e..5fa05dba 100644 > --- a/s390x/spec_ex.c > +++ b/s390x/spec_ex.c > @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void) > return 0; > } > > +static int odd_ex_target(void) > +{ > + uint64_t pre_target_addr; > + int to = 0, from = 0x0dd; > + > + asm volatile ( ".pushsection .text.ex_odd\n" > + " .balign 2\n" > + "pre_odd_ex_target:\n" > + " . = . + 1\n" > + " lr %[to],%[from]\n" > + " .popsection\n" > + > + " larl %[pre_target_addr],pre_odd_ex_target\n" > + " ex 0,1(%[pre_target_addr])\n" > + : [pre_target_addr] "=&a" (pre_target_addr), > + [to] "+d" (to) > + : [from] "d" (from) > + ); > + > + assert((pre_target_addr + 1) & 1); > + report(to != from, "did not perform ex with odd target"); > + return 0; > +} Can this be triggered with KVM, or is this just a test for TCG? In the latter case, Ilya also added a test for this to QEMU's TCG test suite: https://lists.gnu.org/archive/html/qemu-devel/2023-03/msg04872.html ... so if this is only about TCG, it should already be covered there. Thomas
On 17/03/2023 15.09, Thomas Huth wrote: > On 15/03/2023 16.54, Nina Schoetterl-Glausch wrote: >> The EXECUTE instruction executes the instruction at the given target >> address. This address must be halfword aligned, otherwise a >> specification exception occurs. >> Add a test for this. >> >> Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> >> --- >> s390x/spec_ex.c | 25 +++++++++++++++++++++++++ >> 1 file changed, 25 insertions(+) >> >> diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c >> index 83b8c58e..5fa05dba 100644 >> --- a/s390x/spec_ex.c >> +++ b/s390x/spec_ex.c >> @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void) >> return 0; >> } >> +static int odd_ex_target(void) >> +{ >> + uint64_t pre_target_addr; >> + int to = 0, from = 0x0dd; >> + >> + asm volatile ( ".pushsection .text.ex_odd\n" >> + " .balign 2\n" >> + "pre_odd_ex_target:\n" >> + " . = . + 1\n" >> + " lr %[to],%[from]\n" >> + " .popsection\n" >> + >> + " larl %[pre_target_addr],pre_odd_ex_target\n" >> + " ex 0,1(%[pre_target_addr])\n" >> + : [pre_target_addr] "=&a" (pre_target_addr), >> + [to] "+d" (to) >> + : [from] "d" (from) >> + ); >> + >> + assert((pre_target_addr + 1) & 1); >> + report(to != from, "did not perform ex with odd target"); >> + return 0; >> +} > > Can this be triggered with KVM, or is this just a test for TCG? With "triggered" I mean: Can this cause an interception in KVM? Thomas
On Fri, 17 Mar 2023 15:11:35 +0100 Thomas Huth <thuth@redhat.com> wrote: > On 17/03/2023 15.09, Thomas Huth wrote: > > On 15/03/2023 16.54, Nina Schoetterl-Glausch wrote: > >> The EXECUTE instruction executes the instruction at the given target > >> address. This address must be halfword aligned, otherwise a > >> specification exception occurs. > >> Add a test for this. > >> > >> Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> > >> --- > >> s390x/spec_ex.c | 25 +++++++++++++++++++++++++ > >> 1 file changed, 25 insertions(+) > >> > >> diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c > >> index 83b8c58e..5fa05dba 100644 > >> --- a/s390x/spec_ex.c > >> +++ b/s390x/spec_ex.c > >> @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void) > >> return 0; > >> } > >> +static int odd_ex_target(void) > >> +{ > >> + uint64_t pre_target_addr; > >> + int to = 0, from = 0x0dd; > >> + > >> + asm volatile ( ".pushsection .text.ex_odd\n" > >> + " .balign 2\n" > >> + "pre_odd_ex_target:\n" > >> + " . = . + 1\n" > >> + " lr %[to],%[from]\n" > >> + " .popsection\n" > >> + > >> + " larl %[pre_target_addr],pre_odd_ex_target\n" > >> + " ex 0,1(%[pre_target_addr])\n" > >> + : [pre_target_addr] "=&a" (pre_target_addr), > >> + [to] "+d" (to) > >> + : [from] "d" (from) > >> + ); > >> + > >> + assert((pre_target_addr + 1) & 1); > >> + report(to != from, "did not perform ex with odd target"); > >> + return 0; > >> +} > > > > Can this be triggered with KVM, or is this just a test for TCG? > > With "triggered" I mean: Can this cause an interception in KVM? AFAIK no, but KVM and TCG are not the only things we might want to test. we are aware of the TCG tests, and we would like to also keep the KVM unit tests. > > Thomas >
On 17/03/2023 16.36, Claudio Imbrenda wrote: > On Fri, 17 Mar 2023 15:11:35 +0100 > Thomas Huth <thuth@redhat.com> wrote: > >> On 17/03/2023 15.09, Thomas Huth wrote: >>> On 15/03/2023 16.54, Nina Schoetterl-Glausch wrote: >>>> The EXECUTE instruction executes the instruction at the given target >>>> address. This address must be halfword aligned, otherwise a >>>> specification exception occurs. >>>> Add a test for this. >>>> >>>> Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> >>>> --- >>>> s390x/spec_ex.c | 25 +++++++++++++++++++++++++ >>>> 1 file changed, 25 insertions(+) >>>> >>>> diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c >>>> index 83b8c58e..5fa05dba 100644 >>>> --- a/s390x/spec_ex.c >>>> +++ b/s390x/spec_ex.c >>>> @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void) >>>> return 0; >>>> } >>>> +static int odd_ex_target(void) >>>> +{ >>>> + uint64_t pre_target_addr; >>>> + int to = 0, from = 0x0dd; >>>> + >>>> + asm volatile ( ".pushsection .text.ex_odd\n" >>>> + " .balign 2\n" >>>> + "pre_odd_ex_target:\n" >>>> + " . = . + 1\n" >>>> + " lr %[to],%[from]\n" >>>> + " .popsection\n" >>>> + >>>> + " larl %[pre_target_addr],pre_odd_ex_target\n" >>>> + " ex 0,1(%[pre_target_addr])\n" >>>> + : [pre_target_addr] "=&a" (pre_target_addr), >>>> + [to] "+d" (to) >>>> + : [from] "d" (from) >>>> + ); >>>> + >>>> + assert((pre_target_addr + 1) & 1); >>>> + report(to != from, "did not perform ex with odd target"); >>>> + return 0; >>>> +} >>> >>> Can this be triggered with KVM, or is this just a test for TCG? >> >> With "triggered" I mean: Can this cause an interception in KVM? > > AFAIK no, but KVM and TCG are not the only things we might want to test. Ok, fair, KVM unit tests are not for KVM only anymore since quite a while, so if this is helpful elsewhere, I'm fine with this. Acked-by: Thomas Huth <thuth@redhat.com>
On 3/17/23 17:37, Thomas Huth wrote: > On 17/03/2023 16.36, Claudio Imbrenda wrote: >> On Fri, 17 Mar 2023 15:11:35 +0100 >> Thomas Huth <thuth@redhat.com> wrote: >> >>> On 17/03/2023 15.09, Thomas Huth wrote: >>>> On 15/03/2023 16.54, Nina Schoetterl-Glausch wrote: >>>>> The EXECUTE instruction executes the instruction at the given target >>>>> address. This address must be halfword aligned, otherwise a >>>>> specification exception occurs. >>>>> Add a test for this. >>>>> >>>>> Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> >>>>> --- >>>>> s390x/spec_ex.c | 25 +++++++++++++++++++++++++ >>>>> 1 file changed, 25 insertions(+) >>>>> >>>>> diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c >>>>> index 83b8c58e..5fa05dba 100644 >>>>> --- a/s390x/spec_ex.c >>>>> +++ b/s390x/spec_ex.c >>>>> @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void) >>>>> return 0; >>>>> } >>>>> +static int odd_ex_target(void) >>>>> +{ >>>>> + uint64_t pre_target_addr; >>>>> + int to = 0, from = 0x0dd; >>>>> + >>>>> + asm volatile ( ".pushsection .text.ex_odd\n" >>>>> + " .balign 2\n" >>>>> + "pre_odd_ex_target:\n" >>>>> + " . = . + 1\n" >>>>> + " lr %[to],%[from]\n" >>>>> + " .popsection\n" >>>>> + >>>>> + " larl %[pre_target_addr],pre_odd_ex_target\n" >>>>> + " ex 0,1(%[pre_target_addr])\n" >>>>> + : [pre_target_addr] "=&a" (pre_target_addr), >>>>> + [to] "+d" (to) >>>>> + : [from] "d" (from) >>>>> + ); >>>>> + >>>>> + assert((pre_target_addr + 1) & 1); >>>>> + report(to != from, "did not perform ex with odd target"); >>>>> + return 0; >>>>> +} >>>> >>>> Can this be triggered with KVM, or is this just a test for TCG? >>> >>> With "triggered" I mean: Can this cause an interception in KVM? >> >> AFAIK no, but KVM and TCG are not the only things we might want to test. > > Ok, fair, KVM unit tests are not for KVM only anymore since quite a while, > so if this is helpful elsewhere, I'm fine with this. > > Acked-by: Thomas Huth <thuth@redhat.com> Yes, we might be due for a rename on s390x. On multiple occasions I had to tell people that even if the name starts with KVM we're fully capable of testing LPAR and zVM :-) I also want this in for completeness, the line count is certainly of no concern here.
diff --git a/s390x/spec_ex.c b/s390x/spec_ex.c index 83b8c58e..5fa05dba 100644 --- a/s390x/spec_ex.c +++ b/s390x/spec_ex.c @@ -177,6 +177,30 @@ static int short_psw_bit_12_is_0(void) return 0; } +static int odd_ex_target(void) +{ + uint64_t pre_target_addr; + int to = 0, from = 0x0dd; + + asm volatile ( ".pushsection .text.ex_odd\n" + " .balign 2\n" + "pre_odd_ex_target:\n" + " . = . + 1\n" + " lr %[to],%[from]\n" + " .popsection\n" + + " larl %[pre_target_addr],pre_odd_ex_target\n" + " ex 0,1(%[pre_target_addr])\n" + : [pre_target_addr] "=&a" (pre_target_addr), + [to] "+d" (to) + : [from] "d" (from) + ); + + assert((pre_target_addr + 1) & 1); + report(to != from, "did not perform ex with odd target"); + return 0; +} + static int bad_alignment(void) { uint32_t words[5] __attribute__((aligned(16))); @@ -218,6 +242,7 @@ static const struct spec_ex_trigger spec_ex_triggers[] = { { "psw_bit_12_is_1", &psw_bit_12_is_1, false, &fixup_invalid_psw }, { "short_psw_bit_12_is_0", &short_psw_bit_12_is_0, false, &fixup_invalid_psw }, { "psw_odd_address", &psw_odd_address, false, &fixup_invalid_psw }, + { "odd_ex_target", &odd_ex_target, true, NULL }, { "bad_alignment", &bad_alignment, true, NULL }, { "not_even", ¬_even, true, NULL }, { NULL, NULL, false, NULL },
The EXECUTE instruction executes the instruction at the given target address. This address must be halfword aligned, otherwise a specification exception occurs. Add a test for this. Signed-off-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com> --- s390x/spec_ex.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+)