Message ID | 20230405100848.76145-3-philmd@linaro.org (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | target/arm: KVM Aarch32 spring cleaning | expand |
diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ac626b3bef..1fe39c6683 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -204,7 +204,9 @@ static const int a15irqmap[] = { }; static const char *valid_cpus[] = { +#ifdef CONFIG_TCG ARM_CPU_TYPE_NAME("cortex-a7"), +#endif ARM_CPU_TYPE_NAME("cortex-a15"), ARM_CPU_TYPE_NAME("cortex-a35"), ARM_CPU_TYPE_NAME("cortex-a53"),
The Cortex-A7 core is only available when TCG is enabled (see commit 80485d88f9 "target/arm: Restrict v7A TCG cpus to TCG accel"). Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- hw/arm/virt.c | 2 ++ 1 file changed, 2 insertions(+)