| Message ID | 20230504181827.130532-1-mizhang@google.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] KVM: VMX: add MSR_IA32_TSX_CTRL into msrs_to_save | expand |
On Thu, May 4, 2023 at 11:18 AM Mingwei Zhang <mizhang@google.com> wrote: > > Add MSR_IA32_TSX_CTRL into msrs_to_save[] to explicitly tell userspace to > save/restore the register value during migration. Missing this may cause > userspace that relies on KVM ioctl(KVM_GET_MSR_INDEX_LIST) fail to port the > value to the target VM. > > In addition, there is no need to add MSR_IA32_TSX_CTRL when > ARCH_CAP_TSX_CTRL_MSR is not supported in guest. So add the checking in > kvm_probe_msr_to_save(). > > Fixes: b07a5c53d42a ("KVM: vmx: use MSR_IA32_TSX_CTRL to hard-disable TSX on guest that lack it") > Reported-by: Jim Mattson <jmattson@google.com> > Signed-off-by: Mingwei Zhang <mizhang@google.com> Reviewed-by: Jim Mattson <jmattson@google.com>
On 5/5/2023 2:18 AM, Mingwei Zhang wrote: > Add MSR_IA32_TSX_CTRL into msrs_to_save[] to explicitly tell userspace to > save/restore the register value during migration. Missing this may cause > userspace that relies on KVM ioctl(KVM_GET_MSR_INDEX_LIST) fail to port the > value to the target VM. > > In addition, there is no need to add MSR_IA32_TSX_CTRL when > ARCH_CAP_TSX_CTRL_MSR is not supported in guest. So add the checking in > kvm_probe_msr_to_save(). > > Fixes: b07a5c53d42a ("KVM: vmx: use MSR_IA32_TSX_CTRL to hard-disable TSX on guest that lack it") I wonder it's the fix for this commit. Apart from this, Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> > Reported-by: Jim Mattson <jmattson@google.com> > Signed-off-by: Mingwei Zhang <mizhang@google.com> > --- > arch/x86/kvm/x86.c | 6 +++++- > 1 file changed, 5 insertions(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c > index 237c483b1230..c8accbd6c861 100644 > --- a/arch/x86/kvm/x86.c > +++ b/arch/x86/kvm/x86.c > @@ -1431,7 +1431,7 @@ static const u32 msrs_to_save_base[] = { > #endif > MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA, > MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX, > - MSR_IA32_SPEC_CTRL, > + MSR_IA32_SPEC_CTRL, MSR_IA32_TSX_CTRL, > MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH, > MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK, > MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B, > @@ -7077,6 +7077,10 @@ static void kvm_probe_msr_to_save(u32 msr_index) > if (!kvm_cpu_cap_has(X86_FEATURE_XFD)) > return; > break; > + case MSR_IA32_TSX_CTRL: > + if (!(kvm_get_arch_capabilities() & ARCH_CAP_TSX_CTRL_MSR)) > + return; > + break; > default: > break; > }
On Sun, May 7, 2023 at 6:54 PM Xiaoyao Li <xiaoyao.li@intel.com> wrote: > > On 5/5/2023 2:18 AM, Mingwei Zhang wrote: > > Add MSR_IA32_TSX_CTRL into msrs_to_save[] to explicitly tell userspace to > > save/restore the register value during migration. Missing this may cause > > userspace that relies on KVM ioctl(KVM_GET_MSR_INDEX_LIST) fail to port the > > value to the target VM. > > > > In addition, there is no need to add MSR_IA32_TSX_CTRL when > > ARCH_CAP_TSX_CTRL_MSR is not supported in guest. So add the checking in > > kvm_probe_msr_to_save(). > > > > Fixes: b07a5c53d42a ("KVM: vmx: use MSR_IA32_TSX_CTRL to hard-disable TSX on guest that lack it") > > I wonder it's the fix for this commit. > > Apart from this, > > Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> I concur. How about: Fixes: ea732b38b341 ("KVM: vmx: implement MSR_IA32_TSX_CTRL disable RTM functionality") Reviewed-by: Jim Mattson <jmattson@google.com>
On Mon, May 8, 2023 at 10:28 AM Jim Mattson <jmattson@google.com> wrote: > > On Sun, May 7, 2023 at 6:54 PM Xiaoyao Li <xiaoyao.li@intel.com> wrote: > > > > On 5/5/2023 2:18 AM, Mingwei Zhang wrote: > > > Add MSR_IA32_TSX_CTRL into msrs_to_save[] to explicitly tell userspace to > > > save/restore the register value during migration. Missing this may cause > > > userspace that relies on KVM ioctl(KVM_GET_MSR_INDEX_LIST) fail to port the > > > value to the target VM. > > > > > > In addition, there is no need to add MSR_IA32_TSX_CTRL when > > > ARCH_CAP_TSX_CTRL_MSR is not supported in guest. So add the checking in > > > kvm_probe_msr_to_save(). > > > > > > Fixes: b07a5c53d42a ("KVM: vmx: use MSR_IA32_TSX_CTRL to hard-disable TSX on guest that lack it") > > > > I wonder it's the fix for this commit. > > > > Apart from this, > > > > Reviewed-by: Xiaoyao Li <xiaoyao.li@intel.com> > > I concur. > > How about: > > Fixes: ea732b38b341 ("KVM: vmx: implement MSR_IA32_TSX_CTRL disable > RTM functionality") > > Reviewed-by: Jim Mattson <jmattson@google.com> Will send a v3 with the update of the "Fixes"
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c index 237c483b1230..c8accbd6c861 100644 --- a/arch/x86/kvm/x86.c +++ b/arch/x86/kvm/x86.c @@ -1431,7 +1431,7 @@ static const u32 msrs_to_save_base[] = { #endif MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA, MSR_IA32_FEAT_CTL, MSR_IA32_BNDCFGS, MSR_TSC_AUX, - MSR_IA32_SPEC_CTRL, + MSR_IA32_SPEC_CTRL, MSR_IA32_TSX_CTRL, MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH, MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK, MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B, @@ -7077,6 +7077,10 @@ static void kvm_probe_msr_to_save(u32 msr_index) if (!kvm_cpu_cap_has(X86_FEATURE_XFD)) return; break; + case MSR_IA32_TSX_CTRL: + if (!(kvm_get_arch_capabilities() & ARCH_CAP_TSX_CTRL_MSR)) + return; + break; default: break; }
Add MSR_IA32_TSX_CTRL into msrs_to_save[] to explicitly tell userspace to save/restore the register value during migration. Missing this may cause userspace that relies on KVM ioctl(KVM_GET_MSR_INDEX_LIST) fail to port the value to the target VM. In addition, there is no need to add MSR_IA32_TSX_CTRL when ARCH_CAP_TSX_CTRL_MSR is not supported in guest. So add the checking in kvm_probe_msr_to_save(). Fixes: b07a5c53d42a ("KVM: vmx: use MSR_IA32_TSX_CTRL to hard-disable TSX on guest that lack it") Reported-by: Jim Mattson <jmattson@google.com> Signed-off-by: Mingwei Zhang <mizhang@google.com> --- arch/x86/kvm/x86.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)