| Message ID | 20230606091842.13123-7-binbin.wu@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Linear Address Masking (LAM) KVM Enabling | expand |
On Tue, 2023-06-06 at 17:18 +0800, Binbin Wu wrote: > From: Robert Hoo <robert.hu@linux.intel.com> > > LAM feature is enumerated by CPUID.7.1:EAX.LAM[bit 26]. > Expose the feature to userspace as the final step after the following > supports: > - CR4.LAM_SUP virtualization > - CR3.LAM_U48 and CR3.LAM_U57 virtualization > - Check and untag 64-bit linear address when LAM applies in instruction > emulations and VMExit handlers. > > LAM support in SGX enclave mode needs additional enabling and is not > included in this patch series. "needs additional enabling" may not be accurate. Just say: Exposing SGX LAM support is not supported yet. SGX LAM support is enumerated in SGX's own CPUID and there's no hard requirement that it must be supported when LAM is reported in CPUID leaf 0x7. ? Or have you found the answer to above question that I asked in previous series. Anyway: Reviewed-by: Kai Huang <kai.huang@intel.com> > > Signed-off-by: Robert Hoo <robert.hu@linux.intel.com> > Signed-off-by: Binbin Wu <binbin.wu@linux.intel.com> > Reviewed-by: Jingqi Liu <jingqi.liu@intel.com> > Reviewed-by: Chao Gao <chao.gao@intel.com> > Tested-by: Xuelian Guo <xuelian.guo@intel.com> > --- > arch/x86/kvm/cpuid.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 241f554f1764..166243fb5705 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -643,7 +643,7 @@ void kvm_set_cpu_caps(void) > kvm_cpu_cap_mask(CPUID_7_1_EAX, > F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) | > F(FZRM) | F(FSRS) | F(FSRC) | > - F(AMX_FP16) | F(AVX_IFMA) > + F(AMX_FP16) | F(AVX_IFMA) | F(LAM) > ); > > kvm_cpu_cap_init_kvm_defined(CPUID_7_1_EDX,
On 6/7/2023 11:52 AM, Huang, Kai wrote: > On Tue, 2023-06-06 at 17:18 +0800, Binbin Wu wrote: >> From: Robert Hoo<robert.hu@linux.intel.com> >> >> LAM feature is enumerated by CPUID.7.1:EAX.LAM[bit 26]. >> Expose the feature to userspace as the final step after the following >> supports: >> - CR4.LAM_SUP virtualization >> - CR3.LAM_U48 and CR3.LAM_U57 virtualization >> - Check and untag 64-bit linear address when LAM applies in instruction >> emulations and VMExit handlers. >> >> LAM support in SGX enclave mode needs additional enabling and is not >> included in this patch series. > "needs additional enabling" may not be accurate. Just say: > > Exposing SGX LAM support is not supported yet. SGX LAM support is enumerated in > SGX's own CPUID and there's no hard requirement that it must be supported when > LAM is reported in CPUID leaf 0x7. > ? > > Or have you found the answer to above question that I asked in previous series. Sorry for late response. It's just got confirmed that there is _NO_ hard requirement that SGX LAM must be supported when LAM is reported in CPUID leaf 0x7. The changelog you suggeusted above is right and LGTM. Thanks. And another question "Is it possible that CPUID.(EAX=12H,ECX=1):EAX[9:8]=0x3, while CPUID.7.1:EAX.LAM[bit 26] is 0?" No certain answer yet. Will figure it out before adding SGX LAM support. > Anyway: > > Reviewed-by: Kai Huang<kai.huang@intel.com> > >> Signed-off-by: Robert Hoo<robert.hu@linux.intel.com> >> Signed-off-by: Binbin Wu<binbin.wu@linux.intel.com> >> Reviewed-by: Jingqi Liu<jingqi.liu@intel.com> >> Reviewed-by: Chao Gao<chao.gao@intel.com> >> Tested-by: Xuelian Guo<xuelian.guo@intel.com> >> --- >> arch/x86/kvm/cpuid.c | 2 +- >> 1 file changed, 1 insertion(+), 1 deletion(-) >> >> diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c >> index 241f554f1764..166243fb5705 100644 >> --- a/arch/x86/kvm/cpuid.c >> +++ b/arch/x86/kvm/cpuid.c >> @@ -643,7 +643,7 @@ void kvm_set_cpu_caps(void) >> kvm_cpu_cap_mask(CPUID_7_1_EAX, >> F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) | >> F(FZRM) | F(FSRS) | F(FSRC) | >> - F(AMX_FP16) | F(AVX_IFMA) >> + F(AMX_FP16) | F(AVX_IFMA) | F(LAM) >> ); >> >> kvm_cpu_cap_init_kvm_defined(CPUID_7_1_EDX,
diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 241f554f1764..166243fb5705 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -643,7 +643,7 @@ void kvm_set_cpu_caps(void) kvm_cpu_cap_mask(CPUID_7_1_EAX, F(AVX_VNNI) | F(AVX512_BF16) | F(CMPCCXADD) | F(FZRM) | F(FSRS) | F(FSRC) | - F(AMX_FP16) | F(AVX_IFMA) + F(AMX_FP16) | F(AVX_IFMA) | F(LAM) ); kvm_cpu_cap_init_kvm_defined(CPUID_7_1_EDX,