@@ -39,7 +39,12 @@
#define SPR_HSRR1 0x13B
/* Machine State Register definitions: */
+#define MSR_LE_BIT 0
#define MSR_EE_BIT 15 /* External Interrupts Enable */
+#define MSR_HV_BIT 60 /* Hypervisor mode */
#define MSR_SF_BIT 63 /* 64-bit mode */
+#define SPR_HSRR0 0x13A
+#define SPR_HSRR1 0x13B
+
#endif /* _ASMPOWERPC_PPC_ASM_H */
@@ -3,6 +3,7 @@
#include <libcflat.h>
#include <asm/ptrace.h>
+#include <asm/ppc_asm.h>
#ifndef __ASSEMBLY__
void handle_exception(int trap, void (*func)(struct pt_regs *, void *), void *);
@@ -43,6 +44,15 @@ static inline void mtmsr(uint64_t msr)
asm volatile ("mtmsrd %[msr]" :: [msr] "r" (msr) : "memory");
}
+/*
+ * This returns true on PowerNV / OPAL machines which run in hypervisor
+ * mode. False on pseries / PAPR machines that run in guest mode.
+ */
+static inline bool machine_is_powernv(void)
+{
+ return !!(mfmsr() & (1ULL << MSR_HV_BIT));
+}
+
static inline uint64_t get_tb(void)
{
return mfspr(SPR_TB);
@@ -25,7 +25,7 @@ int hcall_have_broken_sc1(void)
return r3 == (unsigned long)H_PRIVILEGE;
}
-void putchar(int c)
+void papr_putchar(int c)
{
unsigned long vty = 0; /* 0 == default */
unsigned long nr_chars = 1;
@@ -34,7 +34,7 @@ void putchar(int c)
hcall(H_PUT_TERM_CHAR, vty, nr_chars, chars);
}
-int __getchar(void)
+int __papr_getchar(void)
{
register unsigned long r3 asm("r3") = H_GET_TERM_CHAR;
register unsigned long r4 asm("r4") = 0; /* 0 == default vty */
@@ -9,13 +9,33 @@
#include <asm/spinlock.h>
#include <asm/rtas.h>
#include <asm/setup.h>
+#include <asm/processor.h>
#include "io.h"
static struct spinlock print_lock;
+void putchar(int c)
+{
+ if (machine_is_powernv())
+ opal_putchar(c);
+ else
+ papr_putchar(c);
+}
+
+int __getchar(void)
+{
+ if (machine_is_powernv())
+ return __opal_getchar();
+ else
+ return __papr_getchar();
+}
+
void io_init(void)
{
- rtas_init();
+ if (machine_is_powernv())
+ assert(!opal_init());
+ else
+ rtas_init();
}
void puts(const char *s)
@@ -38,7 +58,10 @@ void exit(int code)
// FIXME: change this print-exit/rtas-poweroff to chr_testdev_exit(),
// maybe by plugging chr-testdev into a spapr-vty.
printf("\nEXIT: STATUS=%d\n", ((code) << 1) | 1);
- rtas_power_off();
+ if (machine_is_powernv())
+ opal_power_off();
+ else
+ rtas_power_off();
halt(code);
__builtin_unreachable();
}
@@ -8,6 +8,12 @@
#define _POWERPC_IO_H_
extern void io_init(void);
+extern int opal_init(void);
+extern void opal_power_off(void);
extern void putchar(int c);
+extern void opal_putchar(int c);
+extern void papr_putchar(int c);
+extern int __opal_getchar(void);
+extern int __papr_getchar(void);
#endif
@@ -71,6 +71,16 @@ void sleep_tb(uint64_t cycles)
{
uint64_t start, end, now;
+ if (machine_is_powernv()) {
+ /*
+ * Could use 'stop' to sleep here which would be interesting.
+ * stop with ESL=0 should be simple enough, ESL=1 would require
+ * SRESET based wakeup which is more involved.
+ */
+ delay(cycles);
+ return;
+ }
+
start = now = get_tb();
end = start + cycles;
@@ -18,6 +18,7 @@
#include <argv.h>
#include <asm/setup.h>
#include <asm/page.h>
+#include <asm/processor.h>
#include <asm/hcall.h>
#include "io.h"
@@ -97,12 +98,13 @@ static void cpu_init(void)
tb_hz = params.tb_hz;
/* Interrupt Endianness */
-
+ if (!machine_is_powernv()) {
#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
- hcall(H_SET_MODE, 1, 4, 0, 0);
+ hcall(H_SET_MODE, 1, 4, 0, 0);
#else
- hcall(H_SET_MODE, 0, 4, 0, 0);
+ hcall(H_SET_MODE, 0, 4, 0, 0);
#endif
+ }
}
static void mem_init(phys_addr_t freemem_start)
new file mode 100644
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+#ifndef _ASMPPC64_HCALL_H_
+#define _ASMPPC64_HCALL_H_
+
+#define OPAL_SUCCESS 0
+
+#define OPAL_CONSOLE_WRITE 1
+#define OPAL_CONSOLE_READ 2
+#define OPAL_CEC_POWER_DOWN 5
+#define OPAL_POLL_EVENTS 10
+#define OPAL_REINIT_CPUS 70
+# define OPAL_REINIT_CPUS_HILE_BE (1 << 0)
+# define OPAL_REINIT_CPUS_HILE_LE (1 << 1)
+
+#endif
new file mode 100644
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (c) 2016 IBM Corporation.
+ */
+
+#include <asm/ppc_asm.h>
+
+ .text
+ .globl opal_call
+opal_call:
+ mr r0,r3
+ mr r3,r4
+ mr r4,r5
+ mr r5,r6
+ mr r6,r7
+ mflr r11
+ std r11,16(r1)
+ mfcr r12
+ stw r12,8(r1)
+ mr r13,r2
+
+ /* Set opal return address */
+ LOAD_REG_ADDR(r11, opal_return)
+ mtlr r11
+ mfmsr r12
+
+ /* switch to BE when we enter OPAL */
+ li r11,(1 << MSR_LE_BIT)
+ andc r12,r12,r11
+ mtspr SPR_HSRR1,r12
+
+ /* load the opal call entry point and base */
+ LOAD_REG_ADDR(r11, opal)
+ ld r12,8(r11)
+ ld r2,0(r11)
+ mtspr SPR_HSRR0,r12
+ hrfid
+
+opal_return:
+ FIXUP_ENDIAN
+ mr r2,r13;
+ lwz r11,8(r1);
+ ld r12,16(r1)
+ mtcr r11;
+ mtlr r12
+ blr
new file mode 100644
@@ -0,0 +1,74 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * OPAL call helpers
+ */
+#include <asm/opal.h>
+#include <libcflat.h>
+#include <libfdt/libfdt.h>
+#include <devicetree.h>
+#include <asm/io.h>
+#include "../powerpc/io.h"
+
+struct opal {
+ uint64_t base;
+ uint64_t entry;
+} opal;
+
+extern int64_t opal_call(int64_t token, int64_t arg1, int64_t arg2, int64_t arg3);
+
+int opal_init(void)
+{
+ const struct fdt_property *prop;
+ int node, len;
+
+ node = fdt_path_offset(dt_fdt(), "/ibm,opal");
+ if (node < 0)
+ return -1;
+
+ prop = fdt_get_property(dt_fdt(), node, "opal-base-address", &len);
+ if (!prop)
+ return -1;
+ opal.base = fdt64_to_cpu(*(uint64_t *)prop->data);
+
+ prop = fdt_get_property(dt_fdt(), node, "opal-entry-address", &len);
+ if (!prop)
+ return -1;
+ opal.entry = fdt64_to_cpu(*(uint64_t *)prop->data);
+
+#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+ if (opal_call(OPAL_REINIT_CPUS, OPAL_REINIT_CPUS_HILE_LE, 0, 0) != OPAL_SUCCESS)
+ return -1;
+#endif
+
+ return 0;
+}
+
+extern void opal_power_off(void)
+{
+ opal_call(OPAL_CEC_POWER_DOWN, 0, 0, 0);
+ while (true)
+ opal_call(OPAL_POLL_EVENTS, 0, 0, 0);
+}
+
+void opal_putchar(int c)
+{
+ unsigned long vty = 0; /* 0 == default */
+ unsigned long nr_chars = cpu_to_be64(1);
+ char ch = c;
+
+ opal_call(OPAL_CONSOLE_WRITE, (int64_t)vty, (int64_t)&nr_chars, (int64_t)&ch);
+}
+
+int __opal_getchar(void)
+{
+ unsigned long vty = 0; /* 0 == default */
+ unsigned long nr_chars = cpu_to_be64(1);
+ char ch;
+ int rc;
+
+ rc = opal_call(OPAL_CONSOLE_READ, (int64_t)vty, (int64_t)&nr_chars, (int64_t)&ch);
+ if (rc != OPAL_SUCCESS)
+ return -1;
+
+ return ch;
+}
@@ -17,6 +17,8 @@ cstart.o = $(TEST_DIR)/cstart64.o
reloc.o = $(TEST_DIR)/reloc64.o
OBJDIRS += lib/ppc64
+cflatobjs += lib/ppc64/opal.o
+cflatobjs += lib/ppc64/opal-calls.o
# ppc64 specific tests
tests = $(TEST_DIR)/spapr_vpa.elf
@@ -92,6 +92,13 @@ start:
sync
isync
+ /* powernv machine does not check broken_sc1 */
+ mfmsr r3
+ li r4,1
+ sldi r4,r4,MSR_HV_BIT
+ and. r3,r3,r4
+ bne 1f
+
/* patch sc1 if needed */
bl hcall_have_broken_sc1
cmpwi r3, 0
@@ -1,5 +1,14 @@
#!/usr/bin/env bash
+get_qemu_machine ()
+{
+ if [ "$MACHINE" ]; then
+ echo $MACHINE
+ else
+ echo pseries
+ fi
+}
+
if [ -z "$KUT_STANDALONE" ]; then
if [ ! -f config.mak ]; then
echo "run ./configure && make first. See ./configure -h"
@@ -12,17 +21,35 @@ fi
ACCEL=$(get_qemu_accelerator) ||
exit $?
+MACHINE=$(get_qemu_machine) ||
+ exit $?
+
+if [[ "$MACHINE" == "powernv"* ]] && [ "$ACCEL" = "kvm" ]; then
+ echo "PowerNV machine does not support KVM. ACCEL=tcg must be specified."
+ exit 2
+fi
+
qemu=$(search_qemu_binary) ||
exit $?
-if ! $qemu -machine '?' 2>&1 | grep 'pseries' > /dev/null; then
- echo "$qemu doesn't support pSeries ('-machine pseries'). Exiting."
+if ! $qemu -machine '?' 2>&1 | grep $MACHINE > /dev/null; then
+ echo "$qemu doesn't support '-machine $MACHINE'. Exiting."
exit 2
fi
-M='-machine pseries'
+M="-machine $MACHINE"
M+=",accel=$ACCEL"
-command="$qemu -nodefaults $M -bios $FIRMWARE"
+B=""
+if [[ "$MACHINE" == "pseries"* ]] ; then
+ B+="-bios $FIRMWARE"
+fi
+
+D=""
+if [[ "$MACHINE" == "powernv"* ]] ; then
+ D+="-device ipmi-bmc-sim,id=bmc0 -device isa-ipmi-bt,bmc=bmc0,irq=10"
+fi
+
+command="$qemu -nodefaults $M $B $D"
command+=" -display none -serial stdio -kernel"
command="$(migration_cmd) $(timeout_cmd) $command"