From patchwork Tue Jun 20 16:33:50 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver Upton X-Patchwork-Id: 13286206 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B32BFEB64DB for ; Tue, 20 Jun 2023 16:35:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232621AbjFTQfx (ORCPT ); Tue, 20 Jun 2023 12:35:53 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:60108 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232711AbjFTQe7 (ORCPT ); Tue, 20 Jun 2023 12:34:59 -0400 Received: from out-8.mta0.migadu.com (out-8.mta0.migadu.com [91.218.175.8]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4BFA1989 for ; Tue, 20 Jun 2023 09:34:50 -0700 (PDT) X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1687278888; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=V57IrHFD18ILe7uikDN+5M77LGEEVOz+Tnc5b85mVjI=; b=HSt2qG+dpsz5ml2bRaUpMBNM0wDOcecVyl/NC1BtWTaDofcpBDU1h2thzEfzSlDaCR4Cj9 nLY14Gjsu2KRuZfJBwcMEbCRRTLDd4YWIFNfRs1x5fejUtxm4FD3CNYx5iO/iIOkOD9ZpQ 8Z8HMylcy5/ggTWM8sezXEh9BvlKQeE= From: Oliver Upton To: kvmarm@lists.linux.dev Cc: kvm@vger.kernel.org, Marc Zyngier , James Morse , Suzuki K Poulose , Zenghui Yu , Will Deacon , Julien Thierry , Salil Mehta , Oliver Upton Subject: [PATCH v2 17/20] aarch64: psci: Implement AFFINITY_INFO Date: Tue, 20 Jun 2023 11:33:50 -0500 Message-ID: <20230620163353.2688567-18-oliver.upton@linux.dev> In-Reply-To: <20230620163353.2688567-1-oliver.upton@linux.dev> References: <20230620163353.2688567-1-oliver.upton@linux.dev> MIME-Version: 1.0 X-Migadu-Flow: FLOW_OUT Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org Implement support for PSCI AFFINITY_INFO by iteratively searching all of the vCPUs in a VM for those that match the specified affinity. Pause the VM to avoid racing against other PSCI calls in the system that might change the power state of the vCPUs. Signed-off-by: Oliver Upton --- arm/aarch64/include/kvm/kvm-cpu-arch.h | 12 +++++- arm/aarch64/psci.c | 59 ++++++++++++++++++++++++++ 2 files changed, 70 insertions(+), 1 deletion(-) diff --git a/arm/aarch64/include/kvm/kvm-cpu-arch.h b/arm/aarch64/include/kvm/kvm-cpu-arch.h index 264d001..5dced04 100644 --- a/arm/aarch64/include/kvm/kvm-cpu-arch.h +++ b/arm/aarch64/include/kvm/kvm-cpu-arch.h @@ -5,12 +5,22 @@ #include "arm-common/kvm-cpu-arch.h" -#define ARM_MPIDR_HWID_BITMASK 0xFF00FFFFFFUL #define ARM_CPU_ID 3, 0, 0, 0 #define ARM_CPU_ID_MPIDR 5 #define ARM_CPU_CTRL 3, 0, 1, 0 #define ARM_CPU_CTRL_SCTLR_EL1 0 +#define ARM_MPIDR_HWID_BITMASK 0xFF00FFFFFFUL +#define ARM_MPIDR_LEVEL_BITS_SHIFT 3 +#define ARM_MPIDR_LEVEL_BITS (1 << ARM_MPIDR_LEVEL_BITS_SHIFT) +#define ARM_MPIDR_LEVEL_MASK ((1 << ARM_MPIDR_LEVEL_BITS) - 1) + +#define ARM_MPIDR_LEVEL_SHIFT(level) \ + (((1 << level) >> 1) << ARM_MPIDR_LEVEL_BITS_SHIFT) + +#define ARM_MPIDR_AFFINITY_LEVEL(mpidr, level) \ + ((mpidr >> ARM_MPIDR_LEVEL_SHIFT(level)) & ARM_MPIDR_LEVEL_MASK) + static inline __u64 __core_reg_id(__u64 offset) { __u64 id = KVM_REG_ARM64 | KVM_REG_ARM_CORE | offset; diff --git a/arm/aarch64/psci.c b/arm/aarch64/psci.c index 254e16e..ac49d7a 100644 --- a/arm/aarch64/psci.c +++ b/arm/aarch64/psci.c @@ -6,6 +6,16 @@ #include #include +#define AFFINITY_MASK(level) ~((0x1UL << ((level) * ARM_MPIDR_LEVEL_BITS)) - 1) + +static unsigned long psci_affinity_mask(unsigned long affinity_level) +{ + if (affinity_level <= 3) + return ARM_MPIDR_HWID_BITMASK & AFFINITY_MASK(affinity_level); + + return 0; +} + static void psci_features(struct kvm_cpu *vcpu, struct arm_smccc_res *res) { u32 arg = smccc_get_arg(vcpu, 1); @@ -20,6 +30,8 @@ static void psci_features(struct kvm_cpu *vcpu, struct arm_smccc_res *res) case PSCI_0_2_FN_CPU_OFF: case PSCI_0_2_FN_CPU_ON: case PSCI_0_2_FN64_CPU_ON: + case PSCI_0_2_FN_AFFINITY_INFO: + case PSCI_0_2_FN64_AFFINITY_INFO: case ARM_SMCCC_VERSION_FUNC_ID: res->a0 = PSCI_RET_SUCCESS; break; @@ -111,6 +123,49 @@ out_continue: kvm_cpu__continue_vm(vcpu); } +static void affinity_info(struct kvm_cpu *vcpu, struct arm_smccc_res *res) +{ + u64 target_affinity = smccc_get_arg(vcpu, 1); + u64 lowest_level = smccc_get_arg(vcpu, 2); + u64 mpidr_mask = psci_affinity_mask(lowest_level); + struct kvm *kvm = vcpu->kvm; + bool matched = false; + int i; + + if (!psci_valid_affinity(target_affinity) || lowest_level > 3) { + res->a0 = PSCI_RET_INVALID_PARAMS; + return; + } + + kvm_cpu__pause_vm(vcpu); + + for (i = 0; i < kvm->nrcpus; i++) { + struct kvm_cpu *tmp = kvm->cpus[i]; + u64 mpidr = kvm_cpu__get_vcpu_mpidr(tmp); + struct kvm_mp_state mp_state; + + if ((mpidr & mpidr_mask) != target_affinity) + continue; + + if (ioctl(tmp->vcpu_fd, KVM_GET_MP_STATE, &mp_state)) + die_perror("KVM_GET_MP_STATE failed"); + + if (mp_state.mp_state != KVM_MP_STATE_STOPPED) { + res->a0 = PSCI_0_2_AFFINITY_LEVEL_ON; + goto out_continue; + } + + matched = true; + } + + if (matched) + res->a0 = PSCI_0_2_AFFINITY_LEVEL_OFF; + else + res->a0 = PSCI_RET_INVALID_PARAMS; +out_continue: + kvm_cpu__continue_vm(vcpu); +} + void handle_psci(struct kvm_cpu *vcpu, struct arm_smccc_res *res) { switch (vcpu->kvm_run->hypercall.nr) { @@ -131,6 +186,10 @@ void handle_psci(struct kvm_cpu *vcpu, struct arm_smccc_res *res) case PSCI_0_2_FN64_CPU_ON: cpu_on(vcpu, res); break; + case PSCI_0_2_FN_AFFINITY_INFO: + case PSCI_0_2_FN64_AFFINITY_INFO: + affinity_info(vcpu, res); + break; default: res->a0 = PSCI_RET_NOT_SUPPORTED; }